From 1c41746a9ad2a2efb16d923814e4af94c3d85568 Mon Sep 17 00:00:00 2001
From: Jonathan Hanks <jonathan.hanks@ligo.org>
Date: Thu, 13 Jan 2022 11:51:05 -0800
Subject: [PATCH] Remove all references to ioremap_nocache and replace with the
 LIGO_IOREMAP macro.

 * This allows the code to call the appropriate version if ioremap/ioremap_nocache depending on the kernel version.
---
 src/drv/mmap.rfm.5565/mmap5565.c      | 5 +++--
 src/drv/mmap.rfm.5579/mmap5579.c      | 5 +++--
 src/drv/mmap.rfm/mmap.c               | 5 +++--
 src/include/drv/gsc16ai64.c           | 5 +++--
 src/include/drv/gsc16ao16.c           | 5 +++--
 src/include/drv/gsc18ai32.c           | 5 +++--
 src/include/drv/gsc18ai64.c           | 5 +++--
 src/include/drv/gsc18ao8.c            | 5 +++--
 src/include/drv/gsc20ao8.c            | 5 +++--
 src/include/drv/ligoPcieTiming_core.c | 3 ++-
 src/include/drv/vmic5565.c            | 7 ++++---
 11 files changed, 33 insertions(+), 22 deletions(-)

diff --git a/src/drv/mmap.rfm.5565/mmap5565.c b/src/drv/mmap.rfm.5565/mmap5565.c
index 659edd19e..b4c1dcb1e 100644
--- a/src/drv/mmap.rfm.5565/mmap5565.c
+++ b/src/drv/mmap.rfm.5565/mmap5565.c
@@ -12,6 +12,7 @@
 #  include <linux/modversions.h>
 #endif
 #include <asm/io.h>
+#include "lingo_ioremap.h"
 
 #define VMIC_VID                0x114a
 #define VMIC_TID                0x5565
@@ -252,7 +253,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
         }
 
 
-  pRfmMem = ioremap_nocache((unsigned long)pci_io_addr, memsize);
+  pRfmMem = LIGO_IOREMAP((unsigned long)pci_io_addr, memsize);
   kmalloc_area[rfm_cnt] = pci_io_addr;
   printk("VMIC%x protected address=0x%lx\n", rfmType, (unsigned long)pRfmMem);
 
@@ -260,7 +261,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
                  rfmType == 0x5565? PCI_BASE_ADDRESS_2:PCI_BASE_ADDRESS_1,
                  &csrAddress);
   printk("CSR address is 0x%x\n",csrAddress);
-  csrAddr = ioremap_nocache((unsigned long)csrAddress, 0x40);
+  csrAddr = LIGO_IOREMAP((unsigned long)csrAddress, 0x40);
 
   if(rfmType == 0x5565) {
           p5565Csr = (VMIC5565_CSR *)csrAddr;
diff --git a/src/drv/mmap.rfm.5579/mmap5579.c b/src/drv/mmap.rfm.5579/mmap5579.c
index 3b3c0d589..830fa09bd 100644
--- a/src/drv/mmap.rfm.5579/mmap5579.c
+++ b/src/drv/mmap.rfm.5579/mmap5579.c
@@ -12,6 +12,7 @@
 #  include <linux/modversions.h>
 #endif
 #include <asm/io.h>
+#include "ligo_ioremap.h"
 
 #define VMIC_VID                0x114a
 #define VMIC_TID                0x5565
@@ -252,7 +253,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
         }
 
 
-  pRfmMem = ioremap_nocache((unsigned long)pci_io_addr, memsize);
+  pRfmMem = LIGO_IOREMAP((unsigned long)pci_io_addr, memsize);
   kmalloc_area[rfm_cnt] = pci_io_addr;
   printk("VMIC%x protected address=0x%lx\n", rfmType, (unsigned long)pRfmMem);
 
@@ -260,7 +261,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
                  rfmType == 0x5565? PCI_BASE_ADDRESS_2:PCI_BASE_ADDRESS_1,
                  &csrAddress);
   printk("CSR address is 0x%x\n",csrAddress);
-  csrAddr = ioremap_nocache((unsigned long)csrAddress, 0x40);
+  csrAddr = LIGO_IOREMAP((unsigned long)csrAddress, 0x40);
 
   if(rfmType == 0x5565) {
           p5565Csr = (VMIC5565_CSR *)csrAddr;
diff --git a/src/drv/mmap.rfm/mmap.c b/src/drv/mmap.rfm/mmap.c
index 47266ff51..489734edb 100644
--- a/src/drv/mmap.rfm/mmap.c
+++ b/src/drv/mmap.rfm/mmap.c
@@ -12,6 +12,7 @@
 #  include <linux/modversions.h>
 #endif
 #include <asm/io.h>
+#include "ligo_ioremap.h"
 
 #define VMIC_VID                0x114a
 #define VMIC_TID                0x5565
@@ -252,7 +253,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
         }
 
 
-  pRfmMem = ioremap_nocache((unsigned long)pci_io_addr, memsize);
+  pRfmMem = LIGO_IOREMAP((unsigned long)pci_io_addr, memsize);
   kmalloc_area[rfm_cnt] = pci_io_addr;
   printk("VMIC%x protected address=0x%lx\n", rfmType, (unsigned long)pRfmMem);
 
@@ -260,7 +261,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
                  rfmType == 0x5565? PCI_BASE_ADDRESS_2:PCI_BASE_ADDRESS_1,
                  &csrAddress);
   printk("CSR address is 0x%x\n",csrAddress);
-  csrAddr = ioremap_nocache((unsigned long)csrAddress, 0x40);
+  csrAddr = LIGO_IOREMAP((unsigned long)csrAddress, 0x40);
 
   if(rfmType == 0x5565) {
           p5565Csr = (VMIC5565_CSR *)csrAddr;
diff --git a/src/include/drv/gsc16ai64.c b/src/include/drv/gsc16ai64.c
index 4ed938afa..d874cec78 100644
--- a/src/include/drv/gsc16ai64.c
+++ b/src/include/drv/gsc16ai64.c
@@ -10,6 +10,7 @@
 
 #include "gsc_adc_common.h"
 #include "gsc16ai64.h"
+#include "ligo_ioremap.h"
 
 // *****************************************************************************
 /// \brief Routine to initialize GSC 16bit, 32 channel ADC modules
@@ -49,7 +50,7 @@ gsc16ai64Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
         return -1;
     printk( "pci0 = 0x%x\n", pci_io_addr );
     /// Map module DMA space directly to computer memory space.
-    _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _adc_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     /// Map the module DMA control registers via PLX chip registers
     adcDma[ devNum ] = (PLX_9056_DMA*)_adc_add;
 
@@ -59,7 +60,7 @@ gsc16ai64Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
         return -1;
     printk( "pci2 = 0x%x\n", pci_io_addr );
     /// Map the module control register so local memory space.
-    _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _adc_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     printk( "ADC I/O address=0x%x  0x%lx\n", pci_io_addr, (long)_adc_add );
     /// Set global ptr to control register memory space.
     _adcPtr[ devNum ] = (GSA_ADC_REG*)_adc_add;
diff --git a/src/include/drv/gsc16ao16.c b/src/include/drv/gsc16ao16.c
index 7bc79a5a4..77552a29a 100644
--- a/src/include/drv/gsc16ao16.c
+++ b/src/include/drv/gsc16ao16.c
@@ -10,6 +10,7 @@
 
 #include "gsc_dac_common.h"
 #include "gsc16ao16.h"
+#include "ligo_ioremap.h"
 
 // *****************************************************************************
 /// \brief Routine to initialize GSC 16AO16 DAC modules.
@@ -43,7 +44,7 @@ gsc16ao16Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
     if(pedStatus != 0)
         return -1;
     printk( "pci0 = 0x%x\n", pci_io_addr );
-    _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _dac_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     /// Set up a pointer to DMA registers on PLX chip
     dacDma[ devNum ] = (PLX_9056_DMA*)_dac_add;
 
@@ -52,7 +53,7 @@ gsc16ao16Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
     if(pedStatus != 0)
         return -1;
     printk( "dac pci2 = 0x%x\n", pci_io_addr );
-    _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _dac_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     printk( "DAC I/O address=0x%x  0x%lx\n", pci_io_addr, (long)_dac_add );
     _dacPtr[ devNum ] = (GSC_DAC_REG*)_dac_add;
 
diff --git a/src/include/drv/gsc18ai32.c b/src/include/drv/gsc18ai32.c
index 54bfb14b7..8297e7bc9 100644
--- a/src/include/drv/gsc18ai32.c
+++ b/src/include/drv/gsc18ai32.c
@@ -6,6 +6,7 @@
 
 #include "gsc_adc_common.h"
 #include "gsc18ai32.h"
+#include "ligo_ioremap.h"
 
 // *****************************************************************************
 /// \brief Routine to initialize GSC 18bit, 32 channel ADC modules
@@ -43,7 +44,7 @@ gsc18ai32Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
         return -1;
     printk( "pci0 = 0x%x\n", pci_io_addr );
     /// Map module DMA space directly to computer memory space.
-    _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _adc_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     /// Map the module DMA control registers via PLX chip registers
     adcDma[ devNum ] = (PLX_9056_DMA*)_adc_add;
 
@@ -53,7 +54,7 @@ gsc18ai32Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
         return -1;
     printk( "pci2 = 0x%x\n", pci_io_addr );
     /// Map the module control register so local memory space.
-    _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _adc_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     printk( "ADC 18 I/O address=0x%x  0x%lx\n", pci_io_addr, (long)_adc_add );
     /// Set global ptr to control register memory space.
     adc18Ptr = (GSA_ADC_REG*)_adc_add;
diff --git a/src/include/drv/gsc18ai64.c b/src/include/drv/gsc18ai64.c
index a1acc2784..ba77e487b 100644
--- a/src/include/drv/gsc18ai64.c
+++ b/src/include/drv/gsc18ai64.c
@@ -6,6 +6,7 @@
 
 #include "gsc_adc_common.h"
 #include "gsc18ai64.h"
+#include "ligo_ioremap.h"
 
 // *****************************************************************************
 /// \brief Routine to initialize GSC 18bit, 64 channel ADC modules
@@ -43,7 +44,7 @@ gsc18ai64Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
         return -1;
     printk( "pci0 = 0x%x\n", pci_io_addr );
     /// Map module DMA space directly to computer memory space.
-    _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _adc_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     /// Map the module DMA control registers via PLX chip registers
     adcDma[ devNum ] = (PLX_9056_DMA*)_adc_add;
 
@@ -53,7 +54,7 @@ gsc18ai64Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
         return -1;
     printk( "pci2 = 0x%x\n", pci_io_addr );
     /// Map the module control register so local memory space.
-    _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _adc_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     printk( "ADC I/O address=0x%x  0x%lx\n", pci_io_addr, (long)_adc_add );
     /// Set global ptr to control register memory space.
     adc18Ptr = (GSA_ADC_REG*)_adc_add;
diff --git a/src/include/drv/gsc18ao8.c b/src/include/drv/gsc18ao8.c
index 9031b0a98..c736c232b 100644
--- a/src/include/drv/gsc18ao8.c
+++ b/src/include/drv/gsc18ao8.c
@@ -10,6 +10,7 @@
 
 #include "gsc_dac_common.h"
 #include "gsc18ao8.h"
+#include "ligo_ioremap.h"
 
 // *****************************************************************************
 /// \brief Routine to initialize GSC 18AO8 DAC modules.
@@ -48,7 +49,7 @@ gsc18ao8Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
     if(pedStatus != 0)
         return -1;
     printk( "pci0 = 0x%x\n", pci_io_addr );
-    _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _dac_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     /// Set up a pointer to DMA registers on PLX chip
     dacDma[ devNum ] = (PLX_9056_DMA*)_dac_add;
 
@@ -57,7 +58,7 @@ gsc18ao8Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
     if(pedStatus != 0)
         return -1;
     printk( "dac pci2 = 0x%x\n", pci_io_addr );
-    _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _dac_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     printk( "DAC I/O address=0x%x  0x%lx\n", pci_io_addr, (long)_dac_add );
 
     dac18bitPtr = (GSC_DAC_REG*)_dac_add;
diff --git a/src/include/drv/gsc20ao8.c b/src/include/drv/gsc20ao8.c
index 2b22bd4db..be3f6f40d 100644
--- a/src/include/drv/gsc20ao8.c
+++ b/src/include/drv/gsc20ao8.c
@@ -10,6 +10,7 @@
 
 #include "gsc_dac_common.h"
 #include "gsc20ao8.h"
+#include "ligo_ioremap.h"
 
 // *****************************************************************************
 /// \brief Routine to initialize GSC 20AO8 DAC modules.
@@ -46,7 +47,7 @@ gsc20ao8Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
     if(pedStatus != 0)
         return -1;
     printk( "pci0 = 0x%x\n", pci_io_addr );
-    _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _dac_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     /// Set up a pointer to DMA registers on PLX chip
     dacDma[ devNum ] = (PLX_9056_DMA*)_dac_add;
 
@@ -56,7 +57,7 @@ gsc20ao8Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
         return -1;
     // Send some info to dmesg
     printk( "dac pci2 = 0x%x\n", pci_io_addr );
-    _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+    _dac_add = LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
     // Send some info to dmesg
     printk( "DAC I/O address=0x%x  0x%lx\n", pci_io_addr, (long)_dac_add );
 
diff --git a/src/include/drv/ligoPcieTiming_core.c b/src/include/drv/ligoPcieTiming_core.c
index 9e302094f..239578499 100644
--- a/src/include/drv/ligoPcieTiming_core.c
+++ b/src/include/drv/ligoPcieTiming_core.c
@@ -3,6 +3,7 @@
 #ifndef LIGO_PCIE_TIMING_CORE_IMPL
 #define LIGO_PCIE_TIMING_CORE_IMPL
 #include "ligoPcieTiming.h"
+#include "ligo_ioremap.h"
 
 /// Convert fractional part of 2^32 Hz LPTC timing counter to microseconds 
 /// \param clock_ticks_2_32_hz fractional time as reported by LPTC
@@ -30,7 +31,7 @@ lptcInit( CDS_HARDWARE* pCds, struct pci_dev* lptcdev )
     printk( "Xilinx enabled status = %d\n", status );
     pci_read_config_dword( lptcdev, PCI_BASE_ADDRESS_0, &pci_io_addr );
     pci_io_addr &= 0xfffffff0;
-    addr = (char*)ioremap_nocache( (unsigned long)pci_io_addr, 0x2000 );
+    addr = (char*)LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x2000 );
     printk( "Xilinx mapped  = 0x%x   0x%p\n", pci_io_addr, addr );
     pCds->lptc[ card ] = (unsigned int*)addr;
 
diff --git a/src/include/drv/vmic5565.c b/src/include/drv/vmic5565.c
index d32cda9ca..080a8f84c 100644
--- a/src/include/drv/vmic5565.c
+++ b/src/include/drv/vmic5565.c
@@ -9,6 +9,7 @@
 ///<    Manual</a>
 
 #include "vmic5565.h"
+#include "ligo_ioremap.h"
 
 // *****************************************************************************
 /// \brief Routine to initialize VMIC RFM modules. \n
@@ -34,7 +35,7 @@ vmic5565Init( CDS_HARDWARE* pHardware, struct pci_dev* rfmdev )
     pci_read_config_dword( rfmdev, PCI_BASE_ADDRESS_3, &pci_io_addr );
     // Map full 128 MByte new cards only
     pHardware->pci_rfm[ devNum ] =
-        (long)ioremap_nocache( (unsigned long)pci_io_addr, 128 * 1024 * 1024 );
+        (long)LIGO_IOREMAP( (unsigned long)pci_io_addr, 128 * 1024 * 1024 );
     // Allocate local memory for IPC DMA xfers from RFM module
     pHardware->pci_rfm_dma[ devNum ] = (long)pci_alloc_consistent(
         rfmdev, IPC_BUFFER_SIZE, &rfm_dma_handle[ devNum ] );
@@ -43,7 +44,7 @@ vmic5565Init( CDS_HARDWARE* pHardware, struct pci_dev* rfmdev )
     // Find the RFM control/status register
     pci_read_config_dword( rfmdev, PCI_BASE_ADDRESS_2, &csrAddress );
     printk( "CSR address is 0x%x\n", csrAddress );
-    csrAddr = ioremap_nocache( (unsigned long)csrAddress, 0x40 );
+    csrAddr = LIGO_IOREMAP( (unsigned long)csrAddress, 0x40 );
 
     p5565Csr[ devNum ] = (VMIC5565_CSR*)csrAddr;
     // pHardware->rfm_reg[devNum] = p5565Csr;
@@ -74,7 +75,7 @@ vmic5565Init( CDS_HARDWARE* pHardware, struct pci_dev* rfmdev )
     // Find DMA Engine controls in RFM Local Configuration Table
     pci_read_config_dword( rfmdev, PCI_BASE_ADDRESS_0, &dmaAddress );
     printk( "DMA address is 0x%ux\n", dmaAddress );
-    dmaAddr = ioremap_nocache( dmaAddress, 0x200 );
+    dmaAddr = LIGO_IOREMAP( dmaAddress, 0x200 );
     p5565Dma[ devNum ] = (VMIC5565DMA*)dmaAddr;
     // pHardware->rfm_dma[devNum] = p5565Dma[devNum];
     printk( "5565DMA at 0x%lx\n", (unsigned long int)p5565Dma[ devNum ] );
-- 
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