diff --git a/src/drv/mmap.rfm.5565/mmap5565.c b/src/drv/mmap.rfm.5565/mmap5565.c
index 659edd19e411328548f32ade705f701647c074e1..436586ad6f37ff5bfc593e5c8b31b13adb76f7b8 100644
--- a/src/drv/mmap.rfm.5565/mmap5565.c
+++ b/src/drv/mmap.rfm.5565/mmap5565.c
@@ -12,6 +12,7 @@
# include <linux/modversions.h>
#endif
#include <asm/io.h>
+#include "lingo_ioremap.h"
#define VMIC_VID 0x114a
#define VMIC_TID 0x5565
@@ -252,7 +253,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
}
- pRfmMem = ioremap_nocache((unsigned long)pci_io_addr, memsize);
+ pRfmMem = IOREMAP((unsigned long)pci_io_addr, memsize);
kmalloc_area[rfm_cnt] = pci_io_addr;
printk("VMIC%x protected address=0x%lx\n", rfmType, (unsigned long)pRfmMem);
@@ -260,7 +261,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
rfmType == 0x5565? PCI_BASE_ADDRESS_2:PCI_BASE_ADDRESS_1,
&csrAddress);
printk("CSR address is 0x%x\n",csrAddress);
- csrAddr = ioremap_nocache((unsigned long)csrAddress, 0x40);
+ csrAddr = IOREMAP((unsigned long)csrAddress, 0x40);
if(rfmType == 0x5565) {
p5565Csr = (VMIC5565_CSR *)csrAddr;
diff --git a/src/drv/mmap.rfm.5579/mmap5579.c b/src/drv/mmap.rfm.5579/mmap5579.c
index 3b3c0d589f4e86dfd8fec0bb2e14f8544181cc77..38599cfb735212ca247fd742e701ea94b670d916 100644
--- a/src/drv/mmap.rfm.5579/mmap5579.c
+++ b/src/drv/mmap.rfm.5579/mmap5579.c
@@ -12,6 +12,7 @@
# include <linux/modversions.h>
#endif
#include <asm/io.h>
+#include "ioremap_selection.h"
#define VMIC_VID 0x114a
#define VMIC_TID 0x5565
@@ -252,7 +253,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
}
- pRfmMem = ioremap_nocache((unsigned long)pci_io_addr, memsize);
+ pRfmMem = IOREMAP((unsigned long)pci_io_addr, memsize);
kmalloc_area[rfm_cnt] = pci_io_addr;
printk("VMIC%x protected address=0x%lx\n", rfmType, (unsigned long)pRfmMem);
@@ -260,7 +261,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
rfmType == 0x5565? PCI_BASE_ADDRESS_2:PCI_BASE_ADDRESS_1,
&csrAddress);
printk("CSR address is 0x%x\n",csrAddress);
- csrAddr = ioremap_nocache((unsigned long)csrAddress, 0x40);
+ csrAddr = IOREMAP((unsigned long)csrAddress, 0x40);
if(rfmType == 0x5565) {
p5565Csr = (VMIC5565_CSR *)csrAddr;
diff --git a/src/drv/mmap.rfm/mmap.c b/src/drv/mmap.rfm/mmap.c
index 47266ff511ecb1bde072bb3b96415c78fca08ccb..4b9aa6d570ca732a7a7859a0b42c78c395ea49ec 100644
--- a/src/drv/mmap.rfm/mmap.c
+++ b/src/drv/mmap.rfm/mmap.c
@@ -12,6 +12,7 @@
# include <linux/modversions.h>
#endif
#include <asm/io.h>
+#include "ioremap_selection.h"
#define VMIC_VID 0x114a
#define VMIC_TID 0x5565
@@ -252,7 +253,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
}
- pRfmMem = ioremap_nocache((unsigned long)pci_io_addr, memsize);
+ pRfmMem = IOREMAP((unsigned long)pci_io_addr, memsize);
kmalloc_area[rfm_cnt] = pci_io_addr;
printk("VMIC%x protected address=0x%lx\n", rfmType, (unsigned long)pRfmMem);
@@ -260,7 +261,7 @@ unsigned long mapcard(struct pci_dev *pcidev, int memsize) {
rfmType == 0x5565? PCI_BASE_ADDRESS_2:PCI_BASE_ADDRESS_1,
&csrAddress);
printk("CSR address is 0x%x\n",csrAddress);
- csrAddr = ioremap_nocache((unsigned long)csrAddress, 0x40);
+ csrAddr = IOREMAP((unsigned long)csrAddress, 0x40);
if(rfmType == 0x5565) {
p5565Csr = (VMIC5565_CSR *)csrAddr;
diff --git a/src/include/drv/gsc16ai64.c b/src/include/drv/gsc16ai64.c
index 4ed938afa6c98eb2cd5b5352337af21eeae22a21..9dbb37bd840a037c2210315509627ecf997adc09 100644
--- a/src/include/drv/gsc16ai64.c
+++ b/src/include/drv/gsc16ai64.c
@@ -10,6 +10,7 @@
#include "gsc_adc_common.h"
#include "gsc16ai64.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// \brief Routine to initialize GSC 16bit, 32 channel ADC modules
@@ -49,7 +50,7 @@ gsc16ai64Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
return -1;
printk( "pci0 = 0x%x\n", pci_io_addr );
/// Map module DMA space directly to computer memory space.
- _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _adc_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
/// Map the module DMA control registers via PLX chip registers
adcDma[ devNum ] = (PLX_9056_DMA*)_adc_add;
@@ -59,7 +60,7 @@ gsc16ai64Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
return -1;
printk( "pci2 = 0x%x\n", pci_io_addr );
/// Map the module control register so local memory space.
- _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _adc_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
printk( "ADC I/O address=0x%x 0x%lx\n", pci_io_addr, (long)_adc_add );
/// Set global ptr to control register memory space.
_adcPtr[ devNum ] = (GSA_ADC_REG*)_adc_add;
diff --git a/src/include/drv/gsc16ao16.c b/src/include/drv/gsc16ao16.c
index 7bc79a5a4412aa72893f4d43357cd75dfaa7a08f..91ffa997bd7f20f8b3d52be0a692d1a0c97992b0 100644
--- a/src/include/drv/gsc16ao16.c
+++ b/src/include/drv/gsc16ao16.c
@@ -10,6 +10,7 @@
#include "gsc_dac_common.h"
#include "gsc16ao16.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// \brief Routine to initialize GSC 16AO16 DAC modules.
@@ -43,7 +44,7 @@ gsc16ao16Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
if(pedStatus != 0)
return -1;
printk( "pci0 = 0x%x\n", pci_io_addr );
- _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _dac_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
/// Set up a pointer to DMA registers on PLX chip
dacDma[ devNum ] = (PLX_9056_DMA*)_dac_add;
@@ -52,7 +53,7 @@ gsc16ao16Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
if(pedStatus != 0)
return -1;
printk( "dac pci2 = 0x%x\n", pci_io_addr );
- _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _dac_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
printk( "DAC I/O address=0x%x 0x%lx\n", pci_io_addr, (long)_dac_add );
_dacPtr[ devNum ] = (GSC_DAC_REG*)_dac_add;
diff --git a/src/include/drv/gsc18ai32.c b/src/include/drv/gsc18ai32.c
index 54bfb14b715c26b1948f3e1eae9358da9ff28db2..740c20e43c755ed117d5e56470232f377971729d 100644
--- a/src/include/drv/gsc18ai32.c
+++ b/src/include/drv/gsc18ai32.c
@@ -6,6 +6,7 @@
#include "gsc_adc_common.h"
#include "gsc18ai32.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// \brief Routine to initialize GSC 18bit, 32 channel ADC modules
@@ -43,7 +44,7 @@ gsc18ai32Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
return -1;
printk( "pci0 = 0x%x\n", pci_io_addr );
/// Map module DMA space directly to computer memory space.
- _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _adc_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
/// Map the module DMA control registers via PLX chip registers
adcDma[ devNum ] = (PLX_9056_DMA*)_adc_add;
@@ -53,7 +54,7 @@ gsc18ai32Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
return -1;
printk( "pci2 = 0x%x\n", pci_io_addr );
/// Map the module control register so local memory space.
- _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _adc_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
printk( "ADC 18 I/O address=0x%x 0x%lx\n", pci_io_addr, (long)_adc_add );
/// Set global ptr to control register memory space.
adc18Ptr = (GSA_ADC_REG*)_adc_add;
diff --git a/src/include/drv/gsc18ai64.c b/src/include/drv/gsc18ai64.c
index a1acc278447b1aa8500cc17aed14ed80c35a6d9c..4206418e82bb1e065ea7622670b61912fed6c85c 100644
--- a/src/include/drv/gsc18ai64.c
+++ b/src/include/drv/gsc18ai64.c
@@ -6,6 +6,7 @@
#include "gsc_adc_common.h"
#include "gsc18ai64.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// \brief Routine to initialize GSC 18bit, 64 channel ADC modules
@@ -43,7 +44,7 @@ gsc18ai64Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
return -1;
printk( "pci0 = 0x%x\n", pci_io_addr );
/// Map module DMA space directly to computer memory space.
- _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _adc_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
/// Map the module DMA control registers via PLX chip registers
adcDma[ devNum ] = (PLX_9056_DMA*)_adc_add;
@@ -53,7 +54,7 @@ gsc18ai64Init( CDS_HARDWARE* pHardware, struct pci_dev* adcdev )
return -1;
printk( "pci2 = 0x%x\n", pci_io_addr );
/// Map the module control register so local memory space.
- _adc_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _adc_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
printk( "ADC I/O address=0x%x 0x%lx\n", pci_io_addr, (long)_adc_add );
/// Set global ptr to control register memory space.
adc18Ptr = (GSA_ADC_REG*)_adc_add;
diff --git a/src/include/drv/gsc18ao8.c b/src/include/drv/gsc18ao8.c
index 9031b0a9884f92fb3d496c3b1888e4a8e5522be4..350e29f1f7c3ebcf63163c8cac97c28a13d6df19 100644
--- a/src/include/drv/gsc18ao8.c
+++ b/src/include/drv/gsc18ao8.c
@@ -10,6 +10,7 @@
#include "gsc_dac_common.h"
#include "gsc18ao8.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// \brief Routine to initialize GSC 18AO8 DAC modules.
@@ -48,7 +49,7 @@ gsc18ao8Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
if(pedStatus != 0)
return -1;
printk( "pci0 = 0x%x\n", pci_io_addr );
- _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _dac_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
/// Set up a pointer to DMA registers on PLX chip
dacDma[ devNum ] = (PLX_9056_DMA*)_dac_add;
@@ -57,7 +58,7 @@ gsc18ao8Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
if(pedStatus != 0)
return -1;
printk( "dac pci2 = 0x%x\n", pci_io_addr );
- _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _dac_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
printk( "DAC I/O address=0x%x 0x%lx\n", pci_io_addr, (long)_dac_add );
dac18bitPtr = (GSC_DAC_REG*)_dac_add;
diff --git a/src/include/drv/gsc20ao8.c b/src/include/drv/gsc20ao8.c
index 2b22bd4dbf3ebf7242fac3470ae19fc36e88d528..e0ec9e1ddf63484370adaa4afe45d9472954aa1b 100644
--- a/src/include/drv/gsc20ao8.c
+++ b/src/include/drv/gsc20ao8.c
@@ -10,6 +10,7 @@
#include "gsc_dac_common.h"
#include "gsc20ao8.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// \brief Routine to initialize GSC 20AO8 DAC modules.
@@ -46,7 +47,7 @@ gsc20ao8Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
if(pedStatus != 0)
return -1;
printk( "pci0 = 0x%x\n", pci_io_addr );
- _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _dac_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
/// Set up a pointer to DMA registers on PLX chip
dacDma[ devNum ] = (PLX_9056_DMA*)_dac_add;
@@ -56,7 +57,7 @@ gsc20ao8Init( CDS_HARDWARE* pHardware, struct pci_dev* dacdev )
return -1;
// Send some info to dmesg
printk( "dac pci2 = 0x%x\n", pci_io_addr );
- _dac_add = ioremap_nocache( (unsigned long)pci_io_addr, 0x200 );
+ _dac_add = IOREMAP( (unsigned long)pci_io_addr, 0x200 );
// Send some info to dmesg
printk( "DAC I/O address=0x%x 0x%lx\n", pci_io_addr, (long)_dac_add );
diff --git a/src/include/drv/ioremap_selection.h b/src/include/drv/ioremap_selection.h
new file mode 100644
index 0000000000000000000000000000000000000000..fdc27e3c0fa8e9395177c585a2b81c942dcd6a1f
--- /dev/null
+++ b/src/include/drv/ioremap_selection.h
@@ -0,0 +1,21 @@
+/*
+ * The ioremap call changes names at kernel 5.6.
+ *
+ * In 5.10 we use ioremap, in older versions we use ioremap_nocache.
+ * At least on x86 the impelmentation of these functions is the same.
+ */
+
+#ifndef IOREMAP_SELECTION_H
+#define IOREMAP_SELECTION_H
+
+/* Keeping IOREMAP as a macro instead of a static inline function as
+ * the kernel has a few similar but different definitions of the argument
+ * types, and I will not wade into that here.
+ */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 6, 0)
+#define IOREMAP ioremap_nocache
+#else
+#define IOREMAP ioremap
+#endif
+
+#endif /* IOREMAP_SELECTION_H */
diff --git a/src/include/drv/ligoPcieTiming_core.c b/src/include/drv/ligoPcieTiming_core.c
index 9e302094f990aca1fa9d36497230de31b5284bc7..4e8b5129a8cadbeb43425a9bd6fef536ba15d63c 100644
--- a/src/include/drv/ligoPcieTiming_core.c
+++ b/src/include/drv/ligoPcieTiming_core.c
@@ -3,6 +3,7 @@
#ifndef LIGO_PCIE_TIMING_CORE_IMPL
#define LIGO_PCIE_TIMING_CORE_IMPL
#include "ligoPcieTiming.h"
+#include "ioremap_selection.h"
/// Convert fractional part of 2^32 Hz LPTC timing counter to microseconds
/// \param clock_ticks_2_32_hz fractional time as reported by LPTC
@@ -30,7 +31,7 @@ lptcInit( CDS_HARDWARE* pCds, struct pci_dev* lptcdev )
printk( "Xilinx enabled status = %d\n", status );
pci_read_config_dword( lptcdev, PCI_BASE_ADDRESS_0, &pci_io_addr );
pci_io_addr &= 0xfffffff0;
- addr = (char*)ioremap_nocache( (unsigned long)pci_io_addr, 0x2000 );
+ addr = (char*)IOREMAP( (unsigned long)pci_io_addr, 0x2000 );
printk( "Xilinx mapped = 0x%x 0x%p\n", pci_io_addr, addr );
pCds->lptc[ card ] = (unsigned int*)addr;
diff --git a/src/include/drv/ligo_ioremap.h b/src/include/drv/ligo_ioremap.h
deleted file mode 100644
index 8529973511bead4680598cc81e1acfdccaee95d7..0000000000000000000000000000000000000000
--- a/src/include/drv/ligo_ioremap.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * The ioremap call changes names.
- *
- * In 5.10 we use ioremap, in older versions we use ioremap_nocache
- */
-
-#ifndef ADVLIGORTS_LIGO_IOREMAP_H
-#define ADVLIGORTS_LIGO_IOREMAP_H
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 6, 0)
-#define LIGO_IOREMAP ioremap_nocache
-#else
-#define LIGO_IOREMAP ioremap
-#endif
-
-#endif /* ADVLIGORTS_LIGO_IOREMAP_H */
diff --git a/src/include/drv/spectracomGPS.c b/src/include/drv/spectracomGPS.c
index 147f8e435f8777e1d353e3d32df2929dd615eee6..7aa0af2b5836822fb297798bb90b30f8ed779155 100644
--- a/src/include/drv/spectracomGPS.c
+++ b/src/include/drv/spectracomGPS.c
@@ -8,7 +8,7 @@
///< TSync-PCIe Manual</a>
#include "spectracomGPS.h"
-#include "ligo_ioremap.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// \brief Initialize TSYNC GPS card (model BC635PCI-U)
@@ -41,7 +41,7 @@ spectracomGpsInitCheckSync( CDS_HARDWARE* pHardware,
pci_io_addr &= 0xfffffff0;
printk( "TSYNC PIC BASE 0 address = %x\n", pci_io_addr );
- addr1 = (unsigned char*)LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x30 );
+ addr1 = (unsigned char*)IOREMAP( (unsigned long)pci_io_addr, 0x30 );
printk( "Remapped 0x%p\n", addr1 );
pHardware->gps = (unsigned int*)addr1;
pHardware->gpsType = TSYNC_RCVR;
diff --git a/src/include/drv/symmetricomGps.c b/src/include/drv/symmetricomGps.c
index 1b86374cd407f0b8f5fd463b87c48907d5affe83..911ef1868932cdc2ade2ad5e547ce2895dff7861 100644
--- a/src/include/drv/symmetricomGps.c
+++ b/src/include/drv/symmetricomGps.c
@@ -1,5 +1,5 @@
#include "symmetricomGps.h"
-#include "ligo_ioremap.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// Initialize Symmetricom GPS card (model BC635PCI-U)
@@ -22,7 +22,7 @@ symmetricomGpsInit( CDS_HARDWARE* pHardware, struct pci_dev* gpsdev )
pci_io_addr &= 0xfffffff0;
printk( "PIC BASE 2 address = %x\n", pci_io_addr );
- addr1 = (unsigned char*)LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x40 );
+ addr1 = (unsigned char*)IOREMAP( (unsigned long)pci_io_addr, 0x40 );
printk( "Remapped 0x%p\n", addr1 );
pHardware->gps = (unsigned int*)addr1;
pHardware->gpsType = SYMCOM_RCVR;
@@ -32,7 +32,7 @@ symmetricomGpsInit( CDS_HARDWARE* pHardware, struct pci_dev* gpsdev )
pci_read_config_dword( gpsdev, PCI_BASE_ADDRESS_3, &pci_io_addr );
pci_io_addr &= 0xfffffff0;
addr3 =
- (unsigned char*)LIGO_IOREMAP( (unsigned long)pci_io_addr, 0x200 );
+ (unsigned char*)IOREMAP( (unsigned long)pci_io_addr, 0x200 );
printk( "PIC BASE 3 address = 0x%x\n", pci_io_addr );
printk( "PIC BASE 3 address = 0x%p\n", addr3 );
dramRead = (unsigned int*)( addr3 + 0x82 );
diff --git a/src/include/drv/vmic5565.c b/src/include/drv/vmic5565.c
index d32cda9cac91e7e3784496d17506af49bddd18a0..de1635de6dbe407501173b94445d4290aaf177a7 100644
--- a/src/include/drv/vmic5565.c
+++ b/src/include/drv/vmic5565.c
@@ -9,6 +9,7 @@
///< Manual</a>
#include "vmic5565.h"
+#include "ioremap_selection.h"
// *****************************************************************************
/// \brief Routine to initialize VMIC RFM modules. \n
@@ -34,7 +35,7 @@ vmic5565Init( CDS_HARDWARE* pHardware, struct pci_dev* rfmdev )
pci_read_config_dword( rfmdev, PCI_BASE_ADDRESS_3, &pci_io_addr );
// Map full 128 MByte new cards only
pHardware->pci_rfm[ devNum ] =
- (long)ioremap_nocache( (unsigned long)pci_io_addr, 128 * 1024 * 1024 );
+ (long)IOREMAP( (unsigned long)pci_io_addr, 128 * 1024 * 1024 );
// Allocate local memory for IPC DMA xfers from RFM module
pHardware->pci_rfm_dma[ devNum ] = (long)pci_alloc_consistent(
rfmdev, IPC_BUFFER_SIZE, &rfm_dma_handle[ devNum ] );
@@ -43,7 +44,7 @@ vmic5565Init( CDS_HARDWARE* pHardware, struct pci_dev* rfmdev )
// Find the RFM control/status register
pci_read_config_dword( rfmdev, PCI_BASE_ADDRESS_2, &csrAddress );
printk( "CSR address is 0x%x\n", csrAddress );
- csrAddr = ioremap_nocache( (unsigned long)csrAddress, 0x40 );
+ csrAddr = IOREMAP( (unsigned long)csrAddress, 0x40 );
p5565Csr[ devNum ] = (VMIC5565_CSR*)csrAddr;
// pHardware->rfm_reg[devNum] = p5565Csr;
@@ -74,7 +75,7 @@ vmic5565Init( CDS_HARDWARE* pHardware, struct pci_dev* rfmdev )
// Find DMA Engine controls in RFM Local Configuration Table
pci_read_config_dword( rfmdev, PCI_BASE_ADDRESS_0, &dmaAddress );
printk( "DMA address is 0x%ux\n", dmaAddress );
- dmaAddr = ioremap_nocache( dmaAddress, 0x200 );
+ dmaAddr = IOREMAP( dmaAddress, 0x200 );
p5565Dma[ devNum ] = (VMIC5565DMA*)dmaAddr;
// pHardware->rfm_dma[devNum] = p5565Dma[devNum];
printk( "5565DMA at 0x%lx\n", (unsigned long int)p5565Dma[ devNum ] );