diff --git a/src/fe/controller.c b/src/fe/controller.c
index 42aa38677708799c227ee215e7691cbedb5b3f34..d24ca930aba18fb68130529dbec5f65a57582149 100644
--- a/src/fe/controller.c
+++ b/src/fe/controller.c
@@ -141,16 +141,13 @@ unsigned int cycleHistWhenHold[64];
#endif
-#if defined(SHMEM_DAQ)
struct rmIpcStr *daqPtr;
-#endif
int getGpsTime(unsigned int *tsyncSec, unsigned int *tsyncUsec);
// Include C code modules
#include "moduleLoad.c"
#include "map.c"
-#include "fb.c"
char daqArea[2*DAQ_DCU_SIZE]; // Space allocation for daqLib buffers
@@ -1559,10 +1556,6 @@ udelay(1000);
pLocalEpics->epicsOutput.diags[FE_DIAGS_IPC_STAT] = ipcErrBits;
if(ipcErrBits) feStatus |= FE_ERROR_IPC;
// Create FB status word for return to EPICS
-#ifdef USE_GM
- pLocalEpics->epicsOutput.diags[FE_DIAGS_FB_NET_STAT] = (fbStat[1] & 3) * 4 + (fbStat[0] & 3);
-#endif
-#if defined(SHMEM_DAQ)
mxStat = 0;
mxDiagR = daqPtr->status;
if((mxDiag & 1) != (mxDiagR & 1)) mxStat = 1;
@@ -1571,7 +1564,6 @@ udelay(1000);
mxDiag = mxDiagR;
if(mxStat != 3)
feStatus |= FE_ERROR_DAQ;;
-#endif
usrHoldTime = 0;
if((pLocalEpics->epicsInput.overflowReset) || (overflowAcc > OVERFLOW_CNTR_LIMIT))
{
diff --git a/src/fe/moduleLoad.c b/src/fe/moduleLoad.c
index 2d3caf7b86e0333aaad1cf9a5e9760e1bc67eab2..9dbd9c5f449ec6fc7697660a46fcf49ab077e294 100644
--- a/src/fe/moduleLoad.c
+++ b/src/fe/moduleLoad.c
@@ -244,7 +244,6 @@ int init_module (void)
// If DAQ is via shared memory (Framebuilder code running on same machine or MX networking is used)
// attach DAQ shared memory location.
-#if defined(SHMEM_DAQ)
sprintf(fname, "%s_daq", SYSTEM_NAME_STRING_LOWER);
ret = mbuf_allocate_area(fname, 64*1024*1024, 0);
if (ret < 0) {
@@ -254,7 +253,6 @@ int init_module (void)
_daq_shm = (unsigned char *)(kmalloc_area[ret]);
printf("Allocated daq shmem; set at 0x%p\n", _daq_shm);
daqPtr = (struct rmIpcStr *) _daq_shm;
-#endif
// Find and initialize all PCI I/O modules *******************************************************
// Following I/O card info is from feCode
@@ -633,7 +631,7 @@ printf("MASTER DAC SLOT %d %d\n",ii,cdsPciModules.dacConfig[ii]);
#ifndef NO_DAQ
printf("Initializing Network\n");
- numFb = cdsDaqNetInit(2);
+ numFb = 1;
if (numFb <= 0) {
printf("Couldn't initialize Myrinet network connection\n");
return -1;
diff --git a/src/include/controller.h b/src/include/controller.h
index 4e8d4cbee3b96eaf07dd77c0b622e4ac6994a618..8fe5f04c6d160d3f820da99a0d90339b1885fac7 100644
--- a/src/include/controller.h
+++ b/src/include/controller.h
@@ -182,10 +182,8 @@ char *build_date = __DATE__ " " __TIME__;
extern int iop_rfm_valid;
volatile char *_epics_shm; ///< Ptr to EPICS shared memory area
char *_ipc_shm; ///< Ptr to inter-process communication area
-#if defined(SHMEM_DAQ)
char *_daq_shm; ///< Ptr to frame builder comm shared mem area
int daq_fd; ///< File descriptor to share memory file
-#endif
long daqBuffer; // Address for daq dual buffers in daqLib.c
CDS_HARDWARE cdsPciModules; // Structure of PCI hardware addresses
diff --git a/src/include/daqmap.h b/src/include/daqmap.h
index 3cb38b3b988ee7146ddf6211ad09f4be56bffd24..180ecb04c55342d7bee5ca4f809c730b3a7c209a 100644
--- a/src/include/daqmap.h
+++ b/src/include/daqmap.h
@@ -70,28 +70,16 @@ typedef struct DAQ_RANGE {
/// Stucture to provide timing and crc info DAQ network driver via shared memory.
typedef struct blockProp {
unsigned int status;
-#ifdef SHMEM_DAQ
unsigned int timeSec; ///< DAQ data timestamp seconds
unsigned int timeNSec; ///< DAQ data timestamp nanoseconds
unsigned int run;
unsigned int cycle;
unsigned int crc; ///< block data CRC checksum
-#else
- unsigned long timeSec;
- unsigned long timeNSec;
- unsigned long run;
- unsigned long cycle;
- unsigned long crc; /* block data CRC checksum */
-#endif
} blockPropT;
/// Structure for passing data info to DAQ network writer via shared memory
struct rmIpcStr {
-#ifdef SHMEM_DAQ
unsigned int cycle; ///< Copy of latest cycle num from blocks
-#else
- unsigned long cycle; /* Copy of latest cycle num from blocks */
-#endif
unsigned int dcuId; ///< id of unit, unique within each site
unsigned int crc; ///< Configuration file's checksum
unsigned int command; ///< Allows DAQSC to command unit.
diff --git a/src/include/drv/daqLib.c b/src/include/drv/daqLib.c
index 72fbf62c515082bb2d818d9f23d14b6c5e4d37f1..2732196211b7fcad0313159381bdf57aea324365 100644
--- a/src/include/drv/daqLib.c
+++ b/src/include/drv/daqLib.c
@@ -9,7 +9,6 @@ volatile DAQ_INFO_BLOCK *pInfo; ///< Ptr to DAQ config in shmem.
extern volatile char *_epics_shm; ///< Ptr to EPICS shmem block
extern long daqBuffer; ///< Address of daqLib swing buffers.
-#ifdef SHMEM_DAQ
extern char *_daq_shm; ///< Pointer to DAQ base address in shared memory.
struct rmIpcStr *dipc; ///< Pointer to DAQ IPC data in shared memory.
struct cdsDaqNetGdsTpNum *tpPtr; ///< Pointer to TP table in shared memory.
@@ -17,7 +16,6 @@ char *mcPtr; ///< Pointer to current DAQ data in shared memory.
char *lmPtr; ///< Pointer to current DAQ data in local memory data buffer.
char *daqShmPtr; ///< Pointer to DAQ data in shared memory.
int fillSize; ///< Amount of data to copy local to shared memory.
-#endif
unsigned int curDaqBlockSize;
@@ -226,7 +224,6 @@ static double dHistory[DCU_MAX_CHANNELS][MAX_HISTRY];
daqSlot = -1;
excSlot = 0;
-#ifdef SHMEM_DAQ
daqShmPtr = _daq_shm + CDS_DAQ_NET_DATA_OFFSET;
buf_size = DAQ_DCU_BLOCK_SIZE*2;
dipc = (struct rmIpcStr *)(_daq_shm + CDS_DAQ_NET_IPC_OFFSET);
@@ -235,7 +232,6 @@ static double dHistory[DCU_MAX_CHANNELS][MAX_HISTRY];
lmPtr = pReadBuffer;
fillSize = DAQ_DCU_BLOCK_SIZE / sysRate;
printf("DIRECT MEMORY MODE of size %d\n",fillSize);
-#endif
crcLength = 0;
@@ -550,11 +546,9 @@ static double dHistory[DCU_MAX_CHANNELS][MAX_HISTRY];
}
} /* end swing buffer write loop */
-#ifdef SHMEM_DAQ
memcpy(mcPtr,lmPtr,fillSize);
mcPtr += fillSize;
lmPtr += fillSize;
-#endif
if(!xferDone)
@@ -573,26 +567,6 @@ static double dHistory[DCU_MAX_CHANNELS][MAX_HISTRY];
crcSend = crcTest;
}
-#ifndef SHMEM_DAQ
- /* Write DAQ data to the Framebuilder 16 times per second */
- if(!daqWaitCycle)
- {
-#ifndef SPECIFIC_CPU
- if(!netStatus) status = cdsDaqNetDaqSend(dcuId,daqBlockNum, daqWriteCycle, fileCrc,
- crcSend,crcLength,validTpNet,tpNumNet,totalSizeNet,pReadBuffer);
-#endif
- daqWriteCycleSend = daqWriteCycle;
- daqWriteCycle = (daqWriteCycle + 1) % DAQ_NUM_DATA_BLOCKS_PER_SECOND;
- }
-#ifdef SPECIFIC_CPU
- if(daqWaitCycle == 2)
- {
- if(!netStatus) status = cdsDaqNetDaqSend(dcuId,daqBlockNum, daqWriteCycleSend, fileCrc,
- crcSend,crcLength,validTpNet,tpNumNet,totalSizeNet,pReadBuffer);
- }
-#endif
-#endif
-
// Read in any selected EXC signals.
excSlot = (excSlot + 1) % sysRate;
//if(validEx)
@@ -632,7 +606,6 @@ static double dHistory[DCU_MAX_CHANNELS][MAX_HISTRY];
pReadBuffer = (char *)pDaqBuffer[phase];
pWriteBuffer = (char *)pDaqBuffer[(phase^1)];
-#ifdef SHMEM_DAQ
// Assign global parameters
dipc->dcuId = dcuId; // DCU id of this system
dipc->crc = fileCrc; // Checksum of the configuration file
@@ -655,17 +628,14 @@ static double dHistory[DCU_MAX_CHANNELS][MAX_HISTRY];
// As the last step set the cycle counter
// Frame builder is looking for cycle change
dipc->cycle =daqBlockNum; // Ready cycle (16 Hz)
-#endif
/* Increment the 1/16 sec block counter */
daqBlockNum = (daqBlockNum + 1) % DAQ_NUM_DATA_BLOCKS_PER_SECOND;
-#ifdef SHMEM_DAQ
mcPtr = daqShmPtr;
mcPtr += buf_size * daqBlockNum;
lmPtr = pReadBuffer;
-#endif
// Check for reconfig request at start of each second
if((pInfo->reconfig == 1) && (daqBlockNum == 0))