From d467bbc2dada4b5788890f1c739ce5ca8b115f66 Mon Sep 17 00:00:00 2001
From: Rolf Bork <rolf.bork@ligo.org>
Date: Wed, 1 Feb 2017 20:12:54 +0000
Subject: [PATCH] Added support for General Standards 20AO8 DAC module, as was
done previously in branch-3.3 for testing.
git-svn-id: https://redoubt.ligo-wa.caltech.edu/svn/advLigoRTS/trunk@4305 6dcd42c9-f523-4c6d-aada-af552506706e
---
NEWS | 1 +
src/epics/simLink/CDS_PARTS.mdl | 707 +++++++++++++++-----------
src/epics/simLink/lib/dac20.mdl | 873 ++++++++++++++++++++++++++++++++
src/epics/util/feCodeGen.pl | 11 +-
src/epics/util/lib/Dac.pm | 3 +-
src/epics/util/lib/Dac18.pm | 3 +-
src/include/drv/cdsHardware.h | 3 +-
src/include/drv/gsc20ao8.c | 172 +++++++
src/include/drv/gsc20ao8.h | 43 ++
9 files changed, 1511 insertions(+), 305 deletions(-)
create mode 100644 src/epics/simLink/lib/dac20.mdl
create mode 100644 src/include/drv/gsc20ao8.c
create mode 100644 src/include/drv/gsc20ao8.h
diff --git a/NEWS b/NEWS
index 10164384a..f8318cdf7 100644
--- a/NEWS
+++ b/NEWS
@@ -2,6 +2,7 @@
==================================================================================================
Changes for X.X
==================================================================================================
+- Added support for General Standards 20AO8 DAC module, as was done for branch-3.3.
- Added auto generation of safe.snap files for models built for the first time.
- Changed IPC error reporting, as requested in Bugzilla 793.
- Added support for Dolphin PCIe network Gen 2 hardware.
diff --git a/src/epics/simLink/CDS_PARTS.mdl b/src/epics/simLink/CDS_PARTS.mdl
index 7fbd6da90..748951669 100644
--- a/src/epics/simLink/CDS_PARTS.mdl
+++ b/src/epics/simLink/CDS_PARTS.mdl
@@ -1,10 +1,9 @@
Library {
Name "CDS_PARTS"
- Version 8.0
+ Version 8.6
MdlSubVersion 0
- SavedCharacterEncoding "US-ASCII"
+ SavedCharacterEncoding "ISO-8859-1"
LibraryType "BlockLibrary"
- SaveDefaultBlockParams on
ScopeRefreshTime 0.035000
OverrideScopeRefreshTime on
DisableAllScopes off
@@ -19,7 +18,7 @@ Library {
$ObjectID 2
$ClassName "Simulink.WindowInfo"
IsActive [1]
- Location [694.0, 249.0, 1036.0, 1047.0]
+ Location [694.0, 33.0, 1036.0, 1047.0]
Object {
$PropName "ModelBrowserInfo"
$ObjectID 3
@@ -41,11 +40,11 @@ Library {
$ObjectID 5
$ClassName "Simulink.EditorInfo"
IsActive [1]
- ViewObjType "SimulinkSubsys"
- LoadSaveID "150"
- Extents [992.0, 874.0]
- ZoomFactor [1.25]
- Offset [0.0, -2.3249999999999886]
+ ViewObjType "SimulinkTopLevel"
+ LoadSaveID "0"
+ Extents [1002.0, 885.0]
+ ZoomFactor [1.4799999999999998]
+ Offset [-5.6843418860808015e-14, -5.6843418860808015e-14]
}
}
}
@@ -53,12 +52,12 @@ Library {
Creator "aivanov"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
- LastModifiedBy "controls"
+ LastModifiedBy "rolf"
ModifiedDateFormat "%<Auto>"
- LastModifiedDate "Fri Apr 22 12:20:09 2016"
- RTWModifiedTimeStamp 383227721
- ModelVersionFormat "1.%<AutoIncrement:390>"
- ConfigurationManager "None"
+ LastModifiedDate "Wed Oct 19 14:38:02 2016"
+ RTWModifiedTimeStamp 398788668
+ ModelVersionFormat "1.%<AutoIncrement:392>"
+ ConfigurationManager "none"
SampleTimeColors off
SampleTimeAnnotations off
LibraryLinkDisplay "all"
@@ -75,29 +74,24 @@ Library {
SortedOrder off
ExecutionContextIcon off
ShowLinearizationAnnotations on
+ ShowVisualizeInsertedRTB on
+ ShowMarkup on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
- BrowserShowLibraryLinks on
- BrowserLookUnderMasks on
+ BrowserShowLibraryLinks off
+ BrowserLookUnderMasks off
SimulationMode "normal"
+ PauseTimes "5"
+ NumberOfSteps 1
+ SnapshotBufferSize 10
+ SnapshotInterval 10
+ NumberOfLastSnapshots 0
LinearizationMsg "none"
Profile off
ParamWorkspaceSource "MATLABWorkspace"
- RecordCoverage off
- CovSaveName "covdata"
- CovMetricSettings "dw"
- CovNameIncrementing off
- CovHtmlReporting on
- CovForceBlockReductionOff on
- covSaveCumulativeToWorkspaceVar on
- CovSaveSingleToWorkspaceVar on
- CovCumulativeReport off
- CovReportOnPause on
- CovModelRefEnable "Off"
- CovExternalEMLEnable off
ExtModeBatchMode off
ExtModeEnableFloating on
ExtModeTrigType "manual"
@@ -126,13 +120,13 @@ Library {
Dimension 1
Simulink.ConfigSet {
$ObjectID 6
- Version "1.12.1"
+ Version "1.15.1"
Array {
Type "Handle"
- Dimension 8
+ Dimension 9
Simulink.SolverCC {
$ObjectID 7
- Version "1.12.1"
+ Version "1.15.1"
StartTime "0.0"
StopTime "10.0"
AbsTol "auto"
@@ -159,6 +153,8 @@ Library {
ZeroCrossControl "UseLocalSettings"
ZeroCrossAlgorithm "Nonadaptive"
AlgebraicLoopSolver "TrustRegion"
+ SolverInfoToggleStatus off
+ IsAutoAppliedInSIP off
SolverResetMethod "Fast"
PositivePriorityOrder off
AutoInsertRateTranBlk off
@@ -167,7 +163,7 @@ Library {
}
Simulink.DataIOCC {
$ObjectID 8
- Version "1.12.1"
+ Version "1.15.1"
Decimation "1"
ExternalInput "[t, u]"
FinalStateName "xFinal"
@@ -185,6 +181,9 @@ Library {
SignalLogging on
DSMLogging on
InspectSignalLogs off
+ VisualizeSimOutput on
+ StreamToWorkspace off
+ StreamVariableName "streamout"
SaveTime on
ReturnWorkspaceOutputs off
StateSaveName "xout"
@@ -196,10 +195,11 @@ Library {
OutputTimes "[]"
ReturnWorkspaceOutputsName "out"
Refine "1"
+ LoggingIntervals "[-inf, inf]"
}
Simulink.OptimizationCC {
$ObjectID 9
- Version "1.12.1"
+ Version "1.15.1"
Array {
Type "Cell"
Dimension 4
@@ -212,14 +212,17 @@ Library {
BlockReduction off
BooleanDataType off
ConditionallyExecuteInputs on
- InlineParams off
- UseIntDivNetSlope off
+ DefaultParameterBehavior "Tunable"
+ UseDivisionForNetSlopeComputation "off"
UseFloatMulNetSlope off
+ DefaultUnderspecifiedDataType "double"
UseSpecifiedMinMax off
InlineInvariantSignals off
OptimizeBlockIOStorage on
BufferReuse on
EnhancedBackFolding off
+ CachingGlobalReferences off
+ GlobalBufferReuse on
StrengthReduction off
ExpressionFolding on
BooleansAsBitfields off
@@ -227,14 +230,13 @@ Library {
EnableMemcpy on
MemcpyThreshold 64
PassReuseOutputArgsAs "Structure reference"
+ PassReuseOutputArgsThreshold 12
ExpressionDepthLimit 2147483647
- FoldNonRolledExpr on
LocalBlockOutputs on
RollThreshold 5
- SystemCodeInlineAuto off
StateBitsets off
DataBitsets off
- UseTempVars off
+ ActiveStateOutputEnumStorageType "Native Integer"
ZeroExternalMemoryAtStartup on
ZeroInternalMemoryAtStartup on
InitFltsAndDblsToZero off
@@ -245,13 +247,12 @@ Library {
LifeSpan "inf"
MaxStackSize "Inherit from target"
BufferReusableBoundary on
- SimCompilerOptimization "Off"
+ SimCompilerOptimization "off"
AccelVerboseBuild off
- ParallelExecutionInRapidAccelerator on
}
Simulink.DebuggingCC {
$ObjectID 10
- Version "1.12.1"
+ Version "1.15.1"
RTPrefix "error"
ConsistencyChecking "none"
ArrayBoundsChecking "none"
@@ -278,7 +279,6 @@ Library {
IgnoredZcDiagnostic "warning"
SolverPrmCheckMsg "none"
InheritedTsInSrcMsg "warning"
- DiscreteInheritContinuousMsg "warning"
MultiTaskDSMMsg "error"
MultiTaskCondExecSysMsg "error"
MultiTaskRateTransMsg "error"
@@ -306,17 +306,16 @@ Library {
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
SFcnCompatibilityMsg "none"
- FrameProcessingCompatibilityMsg "warning"
+ FrameProcessingCompatibilityMsg "error"
UniqueDataStoreMsg "none"
BusObjectLabelMismatch "warning"
RootOutportRequireBusObject "warning"
AssertControl "UseLocalSettings"
- EnableOverflowDetection off
+ AllowSymbolicDim off
ModelReferenceIOMsg "none"
ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"
ModelReferenceVersionMismatchMessage "none"
ModelReferenceIOMismatchMessage "none"
- ModelReferenceCSMismatchMessage "none"
UnknownTsInhSupMsg "warning"
ModelReferenceDataLoggingMessage "warning"
ModelReferenceSymbolNameMessage "warning"
@@ -328,7 +327,7 @@ Library {
StrictBusMsg "Warning"
BusNameAdapt "WarnAndRepair"
NonBusSignalsTreatedAsBus "none"
- LoggingUnavailableSignals "error"
+ SymbolicDimMinMaxWarning "warning"
BlockIODiagnostic "none"
SFUnusedDataAndEventsDiag "warning"
SFUnexpectedBacktrackingDiag "warning"
@@ -338,14 +337,17 @@ Library {
SFUnconditionalTransitionShadowingDiag "warning"
SFUndirectedBroadcastEventsDiag "warning"
SFTransitionActionBeforeConditionDiag "warning"
+ SFOutputUsedAsStateInMooreChartDiag "error"
+ IntegerSaturationMsg "warning"
}
Simulink.HardwareCC {
$ObjectID 11
- Version "1.12.1"
+ Version "1.15.1"
ProdBitPerChar 8
ProdBitPerShort 16
ProdBitPerInt 32
ProdBitPerLong 32
+ ProdBitPerLongLong 64
ProdBitPerFloat 32
ProdBitPerDouble 64
ProdBitPerPointer 32
@@ -355,21 +357,23 @@ Library {
ProdEndianess "Unspecified"
ProdWordSize 32
ProdShiftRightIntArith on
+ ProdLongLongMode off
ProdHWDeviceType "32-bit Generic"
TargetBitPerChar 8
TargetBitPerShort 16
TargetBitPerInt 32
TargetBitPerLong 32
+ TargetBitPerLongLong 64
TargetBitPerFloat 32
TargetBitPerDouble 64
TargetBitPerPointer 32
TargetLargestAtomicInteger "Char"
TargetLargestAtomicFloat "None"
TargetShiftRightIntArith on
+ TargetLongLongMode off
TargetIntDivRoundTo "Undefined"
TargetEndianess "Unspecified"
TargetWordSize 32
- TargetTypeEmulationWarnSuppressLevel 0
TargetPreprocMaxBitsSint 32
TargetPreprocMaxBitsUint 32
TargetHWDeviceType "Specified"
@@ -378,8 +382,9 @@ Library {
}
Simulink.ModelReferenceCC {
$ObjectID 12
- Version "1.12.1"
+ Version "1.15.1"
UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
+ EnableRefExpFcnMdlSchedulingChecks on
CheckModelReferenceTargetMessage "error"
EnableParallelModelReferenceBuilds off
ParallelModelReferenceErrorOnInvalidPool on
@@ -393,22 +398,19 @@ Library {
}
Simulink.SFSimCC {
$ObjectID 13
- Version "1.12.1"
- SFSimEnableDebug on
- SFSimOverflowDetection on
+ Version "1.15.1"
SFSimEcho on
- SimBlas on
SimCtrlC on
- SimExtrinsic on
SimIntegrity on
SimUseLocalCustomCode off
SimParseCustomCode on
SimBuildMode "sf_incremental_build"
+ SimGenImportedTypeDefs off
}
Simulink.RTWCC {
$BackupClass "Simulink.RTWCC"
$ObjectID 14
- Version "1.12.1"
+ Version "1.15.1"
Array {
Type "Cell"
Dimension 6
@@ -421,11 +423,14 @@ Library {
PropName "DisabledProps"
}
SystemTargetFile "grt.tlc"
+ TLCOptions ""
GenCodeOnly off
MakeCommand "make_rtw"
GenerateMakefile on
PackageGeneratedCodeAndArtifacts off
TemplateMakefile "grt_default_tmf"
+ PostCodeGenCommand ""
+ Description ""
GenerateReport off
SaveLog off
RTWVerbose on
@@ -434,41 +439,40 @@ Library {
TLCDebug off
TLCCoverage off
TLCAssert off
- ProcessScriptMode "Default"
- ConfigurationMode "Optimized"
- ConfigAtBuild off
RTWUseLocalCustomCode off
RTWUseSimCustomCode off
+ Toolchain "Automatically locate an installed toolchain"
+ BuildConfiguration "Faster Builds"
IncludeHyperlinkInReport off
LaunchReport off
PortableWordSizes off
- GenerateErtSFunction off
CreateSILPILBlock "None"
CodeExecutionProfiling off
CodeExecutionProfileVariable "executionProfile"
CodeProfilingSaveOptions "SummaryOnly"
CodeProfilingInstrumentation off
+ SILDebugging off
TargetLang "C"
IncludeBusHierarchyInRTWFileBlockHierarchyMap off
- IncludeERTFirstTime off
GenerateTraceInfo off
GenerateTraceReport off
GenerateTraceReportSl off
GenerateTraceReportSf off
GenerateTraceReportEml off
- GenerateCodeInfo off
GenerateWebview off
GenerateCodeMetricsReport off
GenerateCodeReplacementReport off
- RTWCompilerOptimization "Off"
+ GenerateMissedCodeReplacementReport off
+ RTWCompilerOptimization "off"
+ RTWCustomCompilerOptimizations ""
CheckMdlBeforeBuild "Off"
- CustomRebuildMode "OnUpdate"
+ SharedConstantsCachingThreshold 1024
Array {
Type "Handle"
Dimension 2
Simulink.CodeAppCC {
$ObjectID 15
- Version "1.12.1"
+ Version "1.15.1"
Array {
Type "Cell"
Dimension 17
@@ -493,6 +497,7 @@ Library {
}
ForceParamTrailComments off
GenerateComments on
+ CommentStyle "Auto"
IgnoreCustomStorageClasses on
IgnoreTestpoints off
IncHierarchyInIds off
@@ -515,6 +520,7 @@ Library {
CustomSymbolStrBlkIO "rtb_$N$M"
CustomSymbolStrTmpVar "$N$M"
CustomSymbolStrMacro "$R$N$M"
+ CustomSymbolStrUtil "$N$C"
DefineNamingRule "None"
ParamNamingRule "None"
SignalNamingRule "None"
@@ -531,12 +537,12 @@ Library {
Simulink.GRTTargetCC {
$BackupClass "Simulink.TargetCC"
$ObjectID 16
- Version "1.12.1"
+ Version "1.15.1"
Array {
Type "Cell"
- Dimension 15
+ Dimension 14
Cell "IncludeMdlTerminateFcn"
- Cell "CombineOutputUpdateFcns"
+ Cell "GenerateAllocFcn"
Cell "SuppressErrorStatus"
Cell "ERTCustomFileBanners"
Cell "GenerateSampleERTMain"
@@ -549,21 +555,22 @@ Library {
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
- Cell "GenerateAllocFcn"
PropName "DisabledProps"
}
TargetFcnLib "ansi_tfl_table_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
- CodeReplacementLibrary "ANSI_C"
+ GenFloatMathFcnCalls "NOT IN USE"
+ TargetLangStandard "C89/C90 (ANSI)"
+ CodeReplacementLibrary "None"
UtilityFuncGeneration "Auto"
ERTMultiwordTypeDef "System defined"
ERTMultiwordLength 256
MultiwordLength 2048
GenerateFullHeader on
+ InferredTypesCompatibility off
GenerateSampleERTMain off
GenerateTestInterfaces off
- IsPILTarget off
ModelReferenceCompliant on
ParMdlRefBuildCompliant on
CompOptLevelCompliant on
@@ -580,18 +587,23 @@ Library {
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
+ CodeInterfacePackaging "Nonreusable function"
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
SupportVariableSizeSignals off
- EnableShiftOperators on
ParenthesesLevel "Nominal"
+ CastingMode "Nominal"
+ MATLABClassNameForMDSCustomization "Simulink.SoftwareTarget.GRTCustomization"
ModelStepFunctionPrototypeControlCompliant off
- CPPClassGenCompliant off
+ CPPClassGenCompliant on
AutosarCompliant off
GRTInterface on
+ GenerateAllocFcn off
+ UseToolchainInfoCompliant on
+ GenerateSharedConstants on
UseMalloc off
ExtMode off
ExtModeStaticAlloc off
@@ -605,10 +617,38 @@ Library {
RTWCAPIStates off
RTWCAPIRootIO off
GenerateASAP2 off
+ MultiInstanceErrorCode "Error"
}
PropName "Components"
}
}
+ SlCovCC.ConfigComp {
+ $ObjectID 17
+ Version "1.15.1"
+ Description "Simulink Coverage Configuration Component"
+ Name "Simulink Coverage"
+ RecordCoverage off
+ CovPath "/"
+ CovSaveName "covdata"
+ CovMetricSettings "dw"
+ CovNameIncrementing off
+ CovHtmlReporting on
+ CovForceBlockReductionOff on
+ CovEnableCumulative on
+ CovSaveCumulativeToWorkspaceVar on
+ CovSaveSingleToWorkspaceVar on
+ CovCumulativeVarName "covCumulativeData"
+ CovCumulativeReport off
+ CovReportOnPause on
+ CovModelRefEnable "Off"
+ CovExternalEMLEnable off
+ CovSFcnEnable on
+ CovBoundaryAbsTol 1e-05
+ CovBoundaryRelTol 0.01
+ CovUseTimeInterval off
+ CovStartTime 0
+ CovStopTime 0
+ }
PropName "Components"
}
Name "Configuration"
@@ -682,7 +722,6 @@ Library {
}
Block {
BlockType BusCreator
- Inputs "4"
DisplayOption "none"
OutDataTypeStr "Inherit: auto"
NonVirtualBus off
@@ -739,6 +778,7 @@ Library {
}
Block {
BlockType Goto
+ GotoTag "A"
IconDisplay "Tag"
TagVisibility "local"
}
@@ -821,10 +861,15 @@ Library {
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
+ MinAlgLoopOccurrences off
+ PropExecContextOutsideSubsystem off
CheckFcnCallInpInsideContextMsg off
SystemSampleTime "-1"
+ RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
+ FunctionInterfaceSpec "void_void"
+ FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
@@ -834,9 +879,12 @@ Library {
DataTypeOverride "UseLocalSettings"
DataTypeOverrideAppliesTo "AllNumericTypes"
MinMaxOverflowLogging "UseLocalSettings"
+ Opaque off
+ MaskHideContents off
SFBlockType "NONE"
- Variant off
GeneratePreprocessorConditionals off
+ ContentPreviewEnabled off
+ IsWebBlock off
}
Block {
BlockType Sum
@@ -884,8 +932,8 @@ Library {
}
System {
Name "CDS_PARTS"
- Location [694, 249, 1730, 1296]
- Open off
+ Location [694, 33, 1730, 1080]
+ Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
@@ -898,7 +946,7 @@ Library {
ShowPageBoundaries off
ZoomFactor "148"
ReportName "simulink-default.rpt"
- SIDHighWatermark "374"
+ SIDHighWatermark "379"
Block {
BlockType SubSystem
Name " I/O "
@@ -907,16 +955,11 @@ Library {
Position [271, 113, 317, 182]
ZOrder -6
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name " I/O "
- Location [1319, 176, 2347, 1191]
+ Location [694, 33, 1730, 1080]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
@@ -928,7 +971,7 @@ Library {
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
- ZoomFactor "78"
+ ZoomFactor "86"
Block {
BlockType SubSystem
Name "16x16-bit DACs"
@@ -938,13 +981,8 @@ Library {
ZOrder -1
BackgroundColor "cyan"
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "16x16-bit DACs"
Location [386, 80, 1303, 1110]
@@ -1238,6 +1276,64 @@ Library {
}
}
}
+ Block {
+ BlockType SubSystem
+ Name "2x20-bit DACs"
+ SID "375"
+ Ports []
+ Position [590, 371, 750, 499]
+ ZOrder 1
+ RequestExecContextInheritance off
+ Variant off
+ System {
+ Name "2x20-bit DACs"
+ Location [694, 33, 1730, 1080]
+ Open off
+ ModelBrowserVisibility off
+ ModelBrowserWidth 200
+ ScreenColor "white"
+ PaperOrientation "landscape"
+ PaperPositionMode "auto"
+ PaperType "usletter"
+ PaperUnits "inches"
+ TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
+ TiledPageScale 1
+ ShowPageBoundaries off
+ ZoomFactor "100"
+ Block {
+ BlockType Reference
+ Name "DAC_0"
+ SID "378"
+ Description "type=GSC_20AO8,\ncard_num=0 "
+ Ports [8]
+ Position [165, 102, 200, 268]
+ ZOrder 1
+ BackgroundColor "cyan"
+ DropShadow on
+ AttributesFormatString "%<Description>"
+ LibraryVersion "1.6"
+ SourceBlock "dac20/Subsystem"
+ SourceType "SubSystem"
+ ContentPreviewEnabled off
+ }
+ Block {
+ BlockType Reference
+ Name "DAC_1"
+ SID "379"
+ Description "type=GSC_20AO8,\ncard_num=1 "
+ Ports [8]
+ Position [265, 102, 300, 268]
+ ZOrder 2
+ BackgroundColor "cyan"
+ DropShadow on
+ AttributesFormatString "%<Description>"
+ LibraryVersion "1.6"
+ SourceBlock "dac20/Subsystem"
+ SourceType "SubSystem"
+ ContentPreviewEnabled off
+ }
+ }
+ }
Block {
BlockType SubSystem
Name "8x18-bit DACs"
@@ -1247,16 +1343,11 @@ Library {
ZOrder -2
BackgroundColor "cyan"
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "8x18-bit DACs"
- Location [8, 44, 862, 924]
+ Location [694, 33, 1730, 1080]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
@@ -1283,14 +1374,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1306,14 +1390,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1329,14 +1406,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1352,14 +1422,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1375,14 +1438,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1398,14 +1454,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1421,14 +1470,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1444,14 +1486,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1467,14 +1502,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1490,14 +1518,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1513,14 +1534,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1536,14 +1550,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "dac18/Subsystem"
SourceType "SubSystem"
- ShowPortLabels "FromPortIcon"
- SystemSampleTime "-1"
- FunctionWithSeparateData "off"
- RTWMemSecFuncInitTerm "Inherit from model"
- RTWMemSecFuncExecute "Inherit from model"
- RTWMemSecDataConstants "Inherit from model"
- RTWMemSecDataInternal "Inherit from model"
- RTWMemSecDataParameters "Inherit from model"
+ ContentPreviewEnabled off
}
}
}
@@ -1563,6 +1570,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx0/ADC0"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1580,6 +1588,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx1/ADC1"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1597,6 +1606,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx2/ADC2"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1614,6 +1624,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx3/ADC3"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1631,6 +1642,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx4/ADC4"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1648,6 +1660,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx5/ADC5"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1665,6 +1678,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx6/ADC6"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1682,6 +1696,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx7/ADC7"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1699,6 +1714,7 @@ Library {
FontSize 14
SourceBlock "cdsAdcx8/ADC8"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1715,6 +1731,7 @@ Library {
LibraryVersion "1.2"
SourceBlock "cdsAdcx9/ADC9"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType BusSelector
@@ -1753,6 +1770,7 @@ Library {
LibraryVersion "1.1"
SourceBlock "cdsContec1616DIO/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -1769,6 +1787,7 @@ Library {
LibraryVersion "1.3"
SourceBlock "cdsCDO32/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType SubSystem
@@ -1780,13 +1799,8 @@ Library {
BackgroundColor "lightBlue"
AncestorBlock "CDS_PARTS2/IO_PARTS/Contec6464\nModules"
LibraryVersion "*"
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "Contec6464\nModules"
Location [208, 44, 1083, 924]
@@ -2330,49 +2344,77 @@ Library {
Annotation {
SID "98:321"
Name "CONTEC6464 Binary I/O Modules "
- Position [157, 21]
+ Position [157, 21, 420, 41]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -1
FontName "times"
FontSize 18
}
Annotation {
SID "98:322"
Name "Card 0 "
- Position [152, 111]
+ Position [152, 111, 206, 131]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -2
FontName "times"
FontSize 18
}
Annotation {
SID "98:323"
Name "Card 1 "
- Position [327, 111]
+ Position [327, 111, 381, 131]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -3
FontName "times"
FontSize 18
}
Annotation {
SID "98:324"
Name "Card 2 "
- Position [507, 111]
+ Position [507, 111, 561, 131]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -4
FontName "times"
FontSize 18
}
Annotation {
SID "98:325"
Name "User Application Parts *********************************"
- Position [262, 86]
+ Position [262, 86, 728, 106]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -5
FontName "times"
FontSize 18
}
Annotation {
SID "98:326"
Name "IOP Parts *********************************"
- Position [222, 361]
+ Position [222, 361, 594, 381]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -6
FontName "times"
FontSize 18
}
Annotation {
SID "98:327"
Name "Card 3 "
- Position [697, 111]
+ Position [697, 111, 751, 131]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -7
FontName "times"
FontSize 18
}
@@ -2383,8 +2425,7 @@ Library {
Name "DigitalIO"
SID "99"
Tag "cdsDio"
- Description "support for 8 bit input 8 bit output DIO PCI card\nACCESS I/O Products model DIO-24D "
- " "
+ Description "support for 8 bit input 8 bit output DIO PCI card\nACCESS I/O Products model DIO-24D "
Ports [1, 1]
Position [50, 912, 115, 978]
ZOrder -20
@@ -2394,6 +2435,7 @@ Library {
LibraryVersion "1.1"
SourceBlock "cdsDio/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -2406,11 +2448,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag2"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2424,11 +2467,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag3"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2442,11 +2486,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag4"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2460,11 +2505,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag5"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2478,11 +2524,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag6"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2496,11 +2543,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag7"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2514,11 +2562,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag8"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2532,11 +2581,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag9"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2554,6 +2604,7 @@ Library {
LibraryVersion "1.1"
SourceBlock "cdsIPCx/SignalName"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -2570,6 +2621,7 @@ Library {
LibraryVersion "1.1"
SourceBlock "cdsIPCx/SignalName"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -2587,6 +2639,7 @@ Library {
LibraryVersion "1.4"
SourceBlock "cdsRio/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -2604,6 +2657,7 @@ Library {
LibraryVersion "1.1"
SourceBlock "cdsRio1/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -2620,39 +2674,60 @@ Library {
LibraryVersion "1.1"
SourceBlock "cdsIPCx/SignalName"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Annotation {
SID "335"
Name "Binary I/O Modules *******************************************************************"
- Position [397, 831]
+ Position [397, 831, 1151, 851]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -1
FontName "times"
FontSize 18
}
Annotation {
SID "336"
Name "Digital to Analog (DAC) Modules ********"
- Position [187, 316]
+ Position [187, 316, 512, 336]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -2
FontName "times"
FontSize 18
}
Annotation {
SID "337"
Name "Real-time Communications ********"
- Position [162, 566]
+ Position [162, 566, 438, 586]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -3
FontName "times"
FontSize 18
}
Annotation {
SID "338"
Name " aLIGO Real-time Code Generator - I/O Parts Library"
- Position [385, 20]
+ Position [385, 20, 903, 46]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -4
FontName "times"
FontSize 24
}
Annotation {
SID "339"
Name "Analog to Digial (ADC) Modules ***************************************************"
- Position [387, 66]
+ Position [387, 66, 1095, 86]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -5
FontName "times"
FontSize 18
}
@@ -2666,13 +2741,8 @@ Library {
Position [366, 336, 411, 404]
ZOrder -1
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "C Code"
Location [857, 306, 1877, 1289]
@@ -2744,12 +2814,14 @@ Library {
DisplayOption "bar"
}
Line {
+ ZOrder 1
SrcBlock "Function Name"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
+ ZOrder 2
SrcBlock "Mux"
SrcPort 1
DstBlock "Function Name"
@@ -2767,13 +2839,8 @@ Library {
DropShadow on
AncestorBlock "CDS_PARTS/C Code"
LibraryVersion "*"
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "DAQ Channels"
Location [857, 306, 1877, 1289]
@@ -2812,9 +2879,13 @@ Library {
SID "6:7"
Name "#DAQ Channels\n\nONE_DAQ_CHANNEL 2048\nANOTHER_DAQ_CHANNEL 1024\nSCIENCE_FRAME_CHAN* 1024\nUINT32_CHAN ui"
"nt32 2048\nDAQ_CHANNEL_AT_DEFAULT_RATE"
- Position [66, 131]
+ Position [66, 131, 294, 231]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
HorizontalAlignment "left"
DropShadow on
+ ZOrder -1
FontSize 14
}
}
@@ -2830,11 +2901,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag12"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -2845,13 +2917,8 @@ Library {
Position [462, 113, 508, 182]
ZOrder -4
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "EpicsParts"
Location [1419, 271, 2439, 1254]
@@ -3330,12 +3397,14 @@ Library {
SourceType "SubSystem"
}
Line {
+ ZOrder 1
SrcBlock "Ground"
SrcPort 1
DstBlock "EpicsMomentary"
DstPort 1
}
Line {
+ ZOrder 2
SrcBlock "Ground1"
SrcPort 1
DstBlock "EpicsBinIn"
@@ -3344,14 +3413,22 @@ Library {
Annotation {
SID "332"
Name "RCG EPICS Parts Library ******************************"
- Position [287, 31]
+ Position [287, 31, 752, 51]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -1
FontName "times"
FontSize 18
}
Annotation {
SID "333"
Name "Custom For Guardian Scripts ***************************"
- Position [272, 481]
+ Position [272, 481, 732, 501]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -2
FontName "times"
FontSize 18
}
@@ -3367,13 +3444,8 @@ Library {
DropShadow on
FontSize 12
FontWeight "bold"
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "Filters/\nGDS"
Location [1419, 271, 2439, 1254]
@@ -3762,7 +3834,11 @@ Library {
Annotation {
SID "334"
Name "aLIGO RCG - Filter Modules and GDS Parts"
- Position [197, 25]
+ Position [197, 25, 524, 48]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -1
FontName "Times New Roman"
FontSize 18
}
@@ -3776,13 +3852,8 @@ Library {
Position [368, 220, 414, 289]
ZOrder -7
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "MatrixParts"
Location [857, 306, 1877, 1289]
@@ -4196,36 +4267,42 @@ Library {
SourceType "SubSystem"
}
Line {
+ ZOrder 1
SrcBlock "Mux"
SrcPort 1
DstBlock "cdsMuxMatrix"
DstPort 1
}
Line {
+ ZOrder 2
SrcBlock "cdsMuxMatrix"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
+ ZOrder 3
SrcBlock "Mux1"
SrcPort 1
DstBlock "cdsFiltMuxMatrix"
DstPort 1
}
Line {
+ ZOrder 4
SrcBlock "cdsFiltMuxMatrix"
SrcPort 1
DstBlock "Demux1"
DstPort 1
}
Line {
+ ZOrder 5
SrcBlock "Mux2"
SrcPort 1
DstBlock "RampMuxMatrix"
DstPort 1
}
Line {
+ ZOrder 6
SrcBlock "RampMuxMatrix"
SrcPort 1
DstBlock "Demux2"
@@ -4234,14 +4311,22 @@ Library {
Annotation {
SID "340"
Name " aLIGO Real-time Code Generator - Matrix Parts Library ***************"
- Position [310, 30]
+ Position [310, 30, 864, 53]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -1
FontName "Times New Roman"
FontSize 18
}
Annotation {
SID "341"
Name " Legacy Parts Built to Support HEPI Controls **************************"
- Position [325, 440]
+ Position [325, 440, 894, 463]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -2
FontName "Times New Roman"
FontSize 18
}
@@ -4255,17 +4340,12 @@ Library {
Position [461, 221, 507, 290]
ZOrder -8
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "Osc/Phase"
- Location [694, 249, 1730, 1296]
- Open on
+ Location [694, 33, 1730, 1080]
+ Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
@@ -4288,11 +4368,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag40"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -4306,11 +4387,12 @@ Library {
BackgroundColor "magenta"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag41"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -4324,11 +4406,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag42"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -4342,11 +4425,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag43"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -4360,11 +4444,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag44"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -4378,11 +4463,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag45"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -4396,11 +4482,12 @@ Library {
BackgroundColor "yellow"
ShowName off
AttributesFormatString "%<Description>"
- LibraryVersion "1.281"
+ LibraryVersion "1.358"
UserDataPersistent on
UserData "DataTag46"
SourceBlock "simulink/Model-Wide\nUtilities/DocBlock"
SourceType "DocBlock"
+ ContentPreviewEnabled off
DocumentType "Text"
}
Block {
@@ -4438,6 +4525,7 @@ Library {
LibraryVersion "1.5"
SourceBlock "cdsNoise/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -4453,6 +4541,7 @@ Library {
LibraryVersion "1.10"
SourceBlock "cdsOscFixedPhase/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -4469,6 +4558,7 @@ Library {
LibraryVersion "1.6"
SourceBlock "cdsOsc/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -4484,6 +4574,7 @@ Library {
LibraryVersion "1.10"
SourceBlock "cdsOscSetPhase/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -4500,6 +4591,7 @@ Library {
LibraryVersion "1.2"
SourceBlock "cdsPhase/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -4516,6 +4608,7 @@ Library {
LibraryVersion "1.2"
SourceBlock "cdsWfsPhase/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Block {
BlockType Reference
@@ -4532,20 +4625,24 @@ Library {
LibraryVersion "1.6"
SourceBlock "cdsSatCount/Saturation Count Name"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Line {
+ ZOrder 1
SrcBlock "Ground"
SrcPort 1
DstBlock "Oscillator Name"
DstPort 1
}
Line {
+ ZOrder 2
SrcBlock "Ground1"
SrcPort 1
DstBlock "Noise Generator"
DstPort 1
}
Line {
+ ZOrder 3
SrcBlock "Ground2"
SrcPort 1
DstBlock "Oscillator Fixed Phase Name"
@@ -4554,7 +4651,11 @@ Library {
Annotation {
SID "342"
Name "RCG OSC/Phase Parts Library"
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+ Position [182, 21, 406, 41]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -1
FontName "times"
FontSize 18
}
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ZOrder -9
DropShadow on
LibraryVersion "1.216"
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "RT Links"
Location [857, 306, 1877, 1289]
@@ -4695,13 +4791,8 @@ Library {
Position [270, 336, 315, 404]
ZOrder -10
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "WatchDogs"
Location [1319, 176, 2347, 1191]
@@ -4974,13 +5065,8 @@ Library {
Position [366, 112, 413, 182]
ZOrder -11
DropShadow on
- MinAlgLoopOccurrences off
- PropExecContextOutsideSubsystem off
- RTWSystemCode "Auto"
- FunctionWithSeparateData off
- Opaque off
RequestExecContextInheritance off
- MaskHideContents off
+ Variant off
System {
Name "simLinkParts"
Location [694, 249, 1730, 1296]
@@ -5014,6 +5100,7 @@ Library {
ShowName off
Inputs "'signal1','signal2'"
DisplayOption "bar"
+ InheritFromInputs on
}
Block {
BlockType BusSelector
@@ -5163,7 +5250,6 @@ Library {
SID "187"
Position [40, 540, 80, 570]
ZOrder -14
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}
Block {
BlockType Ground
@@ -5289,13 +5375,21 @@ Library {
Annotation {
SID "343"
Name "MUXs"
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+ Position [185, 561, 244, 587]
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+ FixedWidth off
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FontSize 24
}
Annotation {
SID "344"
Name "BUS CREATOR"
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+ Position [306, 563, 426, 583]
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+ FixedWidth off
+ ZOrder -2
FontSize 18
}
}
@@ -5346,24 +5440,37 @@ Library {
LibraryVersion "1.6"
SourceBlock "cdsParameters/Subsystem"
SourceType "SubSystem"
+ ContentPreviewEnabled off
}
Annotation {
SID "364"
Name "Note: \nIn V2.8 and later:\nBIQUAD IIR filter algorithm set \nas default.\nshmem_daq=1 set as defau"
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FontWeight "bold"
}
Annotation {
SID "345"
Name "One cdsParameters block is\nrequired per User Model.\nPart is shown with the 6\nrequired fields. Ad"
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+ Position [122, 121, 316, 173]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -2
}
Annotation {
SID "346"
- Name "Matlab Parts Library for Use with aLIGO Real-time Code Generator - V3.0"
- Position [330, 30]
+ Name "Matlab Parts Library for Use with aLIGO Real-time Code Generator - V3.3"
+ Position [330, 30, 876, 50]
+ InternalMargins [0, 0, 0, 0]
+ FixedHeight off
+ FixedWidth off
+ ZOrder -3
FontName "times"
FontSize 18
}
diff --git a/src/epics/simLink/lib/dac20.mdl b/src/epics/simLink/lib/dac20.mdl
new file mode 100644
index 000000000..cfa82d943
--- /dev/null
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+ SID 1
+ Ports [8]
+ Position [125, 290, 165, 380]
+ MinAlgLoopOccurrences off
+ PropExecContextOutsideSubsystem off
+ RTWSystemCode "Auto"
+ FunctionWithSeparateData off
+ Opaque off
+ RequestExecContextInheritance off
+ MaskHideContents off
+ System {
+ Name "Subsystem"
+ Location [1439, 152, 1734, 728]
+ Open on
+ ModelBrowserVisibility off
+ ModelBrowserWidth 200
+ ScreenColor "white"
+ PaperOrientation "landscape"
+ PaperPositionMode "auto"
+ PaperType "usletter"
+ PaperUnits "inches"
+ TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
+ TiledPageScale 1
+ ShowPageBoundaries off
+ ZoomFactor "100"
+ Block {
+ BlockType Inport
+ Name "In0"
+ SID 2
+ Position [25, 28, 55, 42]
+ IconDisplay "Port number"
+ OutDataType "sfix(16)"
+ OutScaling "2^0"
+ }
+ Block {
+ BlockType Inport
+ Name "In1"
+ SID 3
+ Position [25, 63, 55, 77]
+ Port "2"
+ IconDisplay "Port number"
+ OutDataType "sfix(16)"
+ OutScaling "2^0"
+ }
+ Block {
+ BlockType Inport
+ Name "In2"
+ SID 4
+ Position [25, 98, 55, 112]
+ Port "3"
+ IconDisplay "Port number"
+ OutDataType "sfix(16)"
+ OutScaling "2^0"
+ }
+ Block {
+ BlockType Inport
+ Name "In3"
+ SID 5
+ Position [25, 133, 55, 147]
+ Port "4"
+ IconDisplay "Port number"
+ OutDataType "sfix(16)"
+ OutScaling "2^0"
+ }
+ Block {
+ BlockType Inport
+ Name "In4"
+ SID 6
+ Position [25, 163, 55, 177]
+ Port "5"
+ IconDisplay "Port number"
+ OutDataType "sfix(16)"
+ OutScaling "2^0"
+ }
+ Block {
+ BlockType Inport
+ Name "In5"
+ SID 7
+ Position [25, 198, 55, 212]
+ Port "6"
+ IconDisplay "Port number"
+ OutDataType "sfix(16)"
+ OutScaling "2^0"
+ }
+ Block {
+ BlockType Inport
+ Name "In6"
+ SID 8
+ Position [25, 233, 55, 247]
+ Port "7"
+ IconDisplay "Port number"
+ OutDataType "sfix(16)"
+ OutScaling "2^0"
+ }
+ Block {
+ BlockType Inport
+ Name "In7"
+ SID 9
+ Position [25, 268, 55, 282]
+ Port "8"
+ IconDisplay "Port number"
+ OutDataType "sfix(16)"
+ OutScaling "2^0"
+ }
+ }
+ }
+ Line {
+ SrcBlock "In1"
+ SrcPort 1
+ Points [25, 0; 0, 170]
+ DstBlock "Subsystem"
+ DstPort 1
+ }
+ Line {
+ SrcBlock "In3"
+ SrcPort 1
+ Points [5, 0; 0, 30]
+ DstBlock "Subsystem"
+ DstPort 3
+ }
+ Line {
+ SrcBlock "In4"
+ SrcPort 1
+ DstBlock "Subsystem"
+ DstPort 4
+ }
+ Line {
+ SrcBlock "In5"
+ SrcPort 1
+ Points [10, 0; 0, -25]
+ DstBlock "Subsystem"
+ DstPort 5
+ }
+ Line {
+ SrcBlock "In6"
+ SrcPort 1
+ Points [20, 0; 0, -50]
+ DstBlock "Subsystem"
+ DstPort 6
+ }
+ Line {
+ SrcBlock "In7"
+ SrcPort 1
+ Points [30, 0; 0, -75]
+ DstBlock "Subsystem"
+ DstPort 7
+ }
+ Line {
+ SrcBlock "In8"
+ SrcPort 1
+ Points [40, 0; 0, -100]
+ DstBlock "Subsystem"
+ DstPort 8
+ }
+ Line {
+ SrcBlock "In9"
+ SrcPort 1
+ Points [20, 0; 0, 60]
+ DstBlock "Subsystem"
+ DstPort 2
+ }
+ }
+}
diff --git a/src/epics/util/feCodeGen.pl b/src/epics/util/feCodeGen.pl
index 629155449..3455949cb 100755
--- a/src/epics/util/feCodeGen.pl
+++ b/src/epics/util/feCodeGen.pl
@@ -19,6 +19,7 @@ require "lib/Switch.pm";
require "lib/Gain.pm";
require "lib/Abs.pm";
require "lib/MATH.pm";
+require "lib/Dac20.pm";
#// \b REQUIRED \b ARGUMENTS: \n
#// - Model file name with .mdl extension \n
@@ -1412,12 +1413,15 @@ for($ii=0;$ii<$partCnt;$ii++)
for (0 .. $dacCnt-1) {
if($dacType[$_] eq "GSC_16AO16") {
$dac16Cnt ++;
+ }elsif($dacType[$_] eq "GSC_20AO8") {
+ $dac20Cnt ++;
} else {
$dac18Cnt ++;
}
}
print OUTH "\#define TARGET_DAC16_COUNT $dac16Cnt\n";
print OUTH "\#define TARGET_DAC18_COUNT $dac18Cnt\n";
+ print OUTH "\#define TARGET_DAC20_COUNT $dac20Cnt\n";
} else {
if($virtualiop) {
print OUTH "\#define TARGET_ADC_COUNT 0\n";
@@ -1426,6 +1430,7 @@ for($ii=0;$ii<$partCnt;$ii++)
}
print OUTH "\#define TARGET_DAC16_COUNT 0\n";
print OUTH "\#define TARGET_DAC18_COUNT 0\n";
+ print OUTH "\#define TARGET_DAC20_COUNT 0\n";
}
print OUTH "\#define TARGET_DAQ_FLAG $no_daq\n";
print OUTH "\#endif\n";
@@ -2147,9 +2152,11 @@ for($ii=0;$ii<$adcCnt;$ii++)
for($ii=0;$ii<$dacCnt;$ii++)
{
if ($dacType[$ii] eq "GSC_16AO16") {
- ("CDS::Dac::createDac16Medm") -> ($epicsScreensDir,$sysname,$usite,$dcuId,$medmTarget,$ii);
+ ("CDS::Dac::createDac16Medm") -> ($epicsScreensDir,$sysname,$usite,$dcuId,$medmTarget,$ii);
+ } elsif ($dacType[$ii] eq "GSC_20AO8") {
+ ("CDS::Dac20::createDac20Medm") -> ($epicsScreensDir,$sysname,$usite,$dcuId,$medmTarget,$ii);
} else {
- ("CDS::Dac18::createDac18Medm") -> ($epicsScreensDir,$sysname,$usite,$dcuId,$medmTarget,$ii);
+ ("CDS::Dac18::createDac18Medm") -> ($epicsScreensDir,$sysname,$usite,$dcuId,$medmTarget,$ii);
}
}
diff --git a/src/epics/util/lib/Dac.pm b/src/epics/util/lib/Dac.pm
index a997e6f78..1815b49dd 100644
--- a/src/epics/util/lib/Dac.pm
+++ b/src/epics/util/lib/Dac.pm
@@ -13,7 +13,8 @@ require "lib/medmGen.pm";
# DAC cards we support
%board_types = (
GSC_16AO16 => 1, # General Standards board
- GSC_18AO8 => 1 # 18-bit General Standards DAC board
+ GSC_18AO8 => 1, # 18-bit General Standards DAC board
+ GSC_20AO8 => 1 # 20-bit General Standards DAC board
);
$default_board_type = "GSC_16AO16";
diff --git a/src/epics/util/lib/Dac18.pm b/src/epics/util/lib/Dac18.pm
index d4a895668..77351b4b1 100644
--- a/src/epics/util/lib/Dac18.pm
+++ b/src/epics/util/lib/Dac18.pm
@@ -13,7 +13,8 @@ require "lib/medmGen.pm";
# DAC cards we support
%board_types = (
GSC_16AO16 => 1, # General Standards board
- GSC_18AO8 => 1 # 18-bit General Standards DAC board
+ GSC_18AO8 => 1, # 18-bit General Standards DAC board
+ GSC_20AO8 => 1 # 20-bit General Standards DAC board
);
$default_board_type = "GSC_16AO16";
diff --git a/src/include/drv/cdsHardware.h b/src/include/drv/cdsHardware.h
index 615cd800d..8dd6ebe7b 100644
--- a/src/include/drv/cdsHardware.h
+++ b/src/include/drv/cdsHardware.h
@@ -39,7 +39,7 @@
#define GSC_16AI64SSA 0
#define GSC_18AISS6C 1
#define GSC_16AO16 2
-// vacant 3
+#define GSC_20AO8 3
#define CON_32DO 4
#define ACS_16DIO 5
#define ACS_8DIO 6
@@ -69,6 +69,7 @@ typedef struct CDS_REMOTE_NODES {
#define MAX_IO_MODULES 24
#define OVERFLOW_LIMIT_16BIT 32760
#define OVERFLOW_LIMIT_18BIT 131060
+#define OVERFLOW_LIMIT_20BIT 512240
#define OVERFLOW_CNTR_LIMIT 0x1000000
#define MAX_ADC_WAIT 1000000 // Max time (usec) to wait for ADC data transfer in iop app
#define MAX_ADC_WAIT_CARD_0 23 // Max time (usec) to wait for 1st ADC card data ready
diff --git a/src/include/drv/gsc20ao8.c b/src/include/drv/gsc20ao8.c
new file mode 100644
index 000000000..c47532907
--- /dev/null
+++ b/src/include/drv/gsc20ao8.c
@@ -0,0 +1,172 @@
+/// \file gsc20ao8.c
+/// \brief File contains the initialization routine and various register read/write
+///< operations for the General Standards 20bit, 8 channel DAC modules. \n
+///< For board info, see
+///< <a href="http://www.generalstandards.com/view-products2.php?BD_family=18ao8">GSC 18AO8 Manual</a>
+
+#include "gsc20ao8.h"
+
+// *****************************************************************************
+/// \brief Routine to initialize GSC 20AO8 DAC modules.
+/// @param[in,out] *pHardware Pointer to global data structure for storing I/O
+///< register mapping information.
+/// @param[in] *dacdev PCI address information passed by the mapping code in map.c
+/// @return Status from board enable command.
+// *****************************************************************************
+int gsc20ao8Init(CDS_HARDWARE *pHardware, struct pci_dev *dacdev)
+{
+ int devNum; /// @param devNum Index into CDS_HARDWARE struct for adding board info.
+ char *_dac_add; /// @param *_dac_add DAC register address space
+ static unsigned int pci_io_addr; /// @param pci_io_addr Bus address of PCI card I/O register.
+ int pedStatus; /// @param pedStatus Status return from call to enable device.
+ volatile GSA_20BIT_DAC_REG *dac20bitPtr; /// @param *dac20bitPtr Pointer to DAC control registers.
+ int timer = 0;
+
+ /// Get index into CDS_HARDWARE struct based on total number of DAC cards found by mapping routine
+ /// in map.c
+ devNum = pHardware->dacCount;
+ /// Enable the device, PCI required
+ pedStatus = pci_enable_device(dacdev);
+ /// Register module as Master capable, required for DMA
+ pci_set_master(dacdev);
+ /// Get the PLX chip PCI address, it is advertised at address 0
+ pci_read_config_dword(dacdev,PCI_BASE_ADDRESS_0,&pci_io_addr);
+ printk("pci0 = 0x%x\n",pci_io_addr);
+ _dac_add = ioremap_nocache((unsigned long)pci_io_addr, 0x200);
+ /// Set up a pointer to DMA registers on PLX chip
+ dacDma[devNum] = (PLX_9056_DMA *)_dac_add;
+
+ /// Get the DAC register address
+ pci_read_config_dword(dacdev,PCI_BASE_ADDRESS_2,&pci_io_addr);
+ // Send some info to dmesg
+ printk("dac pci2 = 0x%x\n",pci_io_addr);
+ _dac_add = ioremap_nocache((unsigned long)pci_io_addr, 0x200);
+ // Send some info to dmesg
+ printk("DAC I/O address=0x%x 0x%lx\n", pci_io_addr,(long)_dac_add);
+
+ dac20bitPtr = (GSA_20BIT_DAC_REG *)_dac_add;
+ dacPtr[devNum] = (GSC_DAC_REG *)_dac_add;
+
+ // Send some info to dmesg
+ printk("DAC BCR = 0x%x\n",dac20bitPtr->BCR);
+ /// Reset the DAC board and wait for it to finish (3msec)
+
+ dac20bitPtr->BCR |= GSAO_20BIT_RESET;
+
+ timer = 6000;
+ do{
+ udelay(1000);
+ timer -= 1;
+ }while(dac20bitPtr->BCR & GSAO_20BIT_RESET != 0 &&
+ timer > 0 &&
+ dac20bitPtr->PRIMARY_STATUS == 1);
+ printk("DAC PSR after init = 0x%x and timer = %d\n",dac20bitPtr->PRIMARY_STATUS,timer);
+
+ /// Enable 2s complement by clearing offset binary bit
+ dac20bitPtr->BCR &= ~GSAO_20BIT_OFFSET_BINARY;
+ // Set simultaneous outputs
+ dac20bitPtr->BCR |= GSAO_20BIT_SIMULT_OUT;
+ // Send some info to dmesg
+ printk("DAC BCR after init = 0x%x\n",dac20bitPtr->BCR);
+ printk("DAC OUTPUT CONFIG = 0x%x\n",dac20bitPtr->OUTPUT_CONFIG);
+
+ /// Enable 10 volt output range
+ dac20bitPtr->OUTPUT_CONFIG |= GSAO_20BIT_10VOLT_RANGE;
+ // Set differential outputs
+ dac20bitPtr->OUTPUT_CONFIG |= GSAO_20BIT_DIFF_OUTS;
+ // Enable outputs.
+ dac20bitPtr->BCR |= GSAO_20BIT_OUTPUT_ENABLE;
+ udelay(1000);
+ // Set primary status to detect autocal
+ printk("DAC PSR = 0x%x\n",dac20bitPtr->PRIMARY_STATUS);
+ dac20bitPtr->PRIMARY_STATUS = 2;
+ udelay(1000);
+ printk("DAC PSR after reset = 0x%x\n",dac20bitPtr->PRIMARY_STATUS);
+
+ // Start Calibration
+ dac20bitPtr->BCR |= GSAO_20BIT_AUTOCAL_SET;
+ // Wait for autocal to complete
+ timer = 0;
+ do{
+ udelay(1000);
+ // printk("DAC PSR in autocal = 0x%x\n",dac20bitPtr->PRIMARY_STATUS);
+ timer += 1;
+ }while((dac20bitPtr->BCR & GSAO_20BIT_AUTOCAL_SET) != 0);
+
+ printk("DAC after autocal PSR = 0x%x\n",dac20bitPtr->PRIMARY_STATUS);
+ if(dac20bitPtr->BCR & GSAO_20BIT_AUTOCAL_PASS)
+ printk("DAC AUTOCAL SUCCESS in %d milliseconds \n",timer);
+ else
+ printk("DAC AUTOCAL FAILED in %d milliseconds \n",timer);
+ printk("DAC PSR = 0x%x\n",dac20bitPtr->PRIMARY_STATUS);
+
+ // If 20bit DAC, need to enable outputs.
+ dac20bitPtr->BCR |= GSAO_20BIT_OUTPUT_ENABLE;
+ printk("DAC OUTPUT CONFIG after init = 0x%x with BCR = 0x%x\n",dac20bitPtr->OUTPUT_CONFIG, dac20bitPtr->BCR);
+
+ pHardware->pci_dac[devNum] =
+ (long) pci_alloc_consistent(dacdev,0x200,&dac_dma_handle[devNum]);
+ pHardware->dacConfig[devNum] = (int) (dac20bitPtr->ASY_CONFIG);
+
+ // Return the device type to main code.
+ pHardware->dacType[devNum] = GSC_20AO8;
+ pHardware->dacCount ++;
+
+ /// Call patch in map.c needed to properly write to native PCIe module
+ set_8111_prefetch(dacdev);
+ return(pedStatus);
+}
+
+// *****************************************************************************
+/// \brief Function enables DAC modules to begin receiving external clocking signals.
+/// @param[in] *pHardware Pointer to global data structure for storing I/O
+///< register mapping information.
+// *****************************************************************************
+int gsc20ao8Enable(CDS_HARDWARE *pHardware)
+{
+ int ii;
+
+ for (ii = 0; ii < pHardware -> dacCount; ii++)
+ {
+ if (pHardware->dacType[ii] == GSC_20AO8) {
+ volatile GSA_20BIT_DAC_REG *dac20bitPtr = (volatile GSA_20BIT_DAC_REG *)(dacPtr[ii]);
+ dac20bitPtr->OUTPUT_CONFIG |= GSAO_20BIT_EXT_CLOCK_SRC;
+ dac20bitPtr->BUF_OUTPUT_OPS |= GSAO_20BIT_ENABLE_CLOCK;
+ printk("Triggered 20-bit DAC\n");
+ }
+ }
+
+ return(0);
+}
+
+
+// *****************************************************************************
+/// \brief This routine sets up the DAC DMA registers once on code initialization.
+/// @param[in] modNum ID number of board to be accessed.
+// *****************************************************************************
+int gsc20ao8DmaSetup(int modNum)
+{
+ dacDma[modNum]->DMA1_MODE = GSAI_DMA_MODE_NO_INTR;
+ dacDma[modNum]->DMA1_PCI_ADD = (int)dac_dma_handle[modNum];
+ dacDma[modNum]->DMA1_LOC_ADD = GSAO_20BIT_DMA_LOCAL_ADDR;
+#ifdef OVERSAMPLE_DAC
+ dacDma[modNum]->DMA1_BTC = 0x20*OVERSAMPLE_TIMES;
+#else
+ dacDma[modNum]->DMA1_BTC = 0x20;
+#endif
+ dacDma[modNum]->DMA1_DESC = 0x0;
+ return(1);
+}
+
+
+// *****************************************************************************
+/// \brief This routine starts a DMA operation to a DAC module.
+///< It must first be setup by the gsc20ao8DmaSetup call.
+// *****************************************************************************
+void gsc20ao8DmaStart(int modNum)
+{
+ // dacDma[modNum]->DMA1_PCI_ADD = ((int)dac_dma_handle[modNum]);
+ dacDma[modNum]->DMA_CSR = GSAI_DMA1_START;
+}
+
+
diff --git a/src/include/drv/gsc20ao8.h b/src/include/drv/gsc20ao8.h
new file mode 100644
index 000000000..2b16953ba
--- /dev/null
+++ b/src/include/drv/gsc20ao8.h
@@ -0,0 +1,43 @@
+/* GSA 20-bit DAC Module Defs ********************************************************* */
+typedef struct GSA_20BIT_DAC_REG {
+ unsigned int BCR; /* 0x00 */
+ unsigned int digital_io_ports; /* 0x04 */
+ unsigned int reserved; /* 0x08 */
+ unsigned int reserved0; /* 0x0c */
+ unsigned int reserved1; /* 0x10 */
+ unsigned int reserved2; /* 0x14 */
+ unsigned int reserved3; /* 0x18 */
+ unsigned int AUX_SYNC_IO_CTRL; /* 0x1c */
+ unsigned int reserved4; /* 0x20 */
+ unsigned int reserved5; /* 0x24 */
+ unsigned int reserved6; /* 0x28 */
+ unsigned int reserved7; /* 0x2c */
+ unsigned int PRIMARY_STATUS; /* 0x30 */
+ unsigned int ASY_CONFIG; /* 0x34 */
+ unsigned int AUTOCAL_VALS; /* 0x38 */
+ unsigned int BUF_OUTPUT_OPS; /* 0x3C */
+ unsigned int OUT_BUF_THRESH; /* 0x40 */
+ unsigned int OUT_BUF_SIZE; /* 0x44 RO */
+ unsigned int OUTPUT_BUF; /* 0x48 WO */
+ unsigned int RATE_GEN_A; /* 0x4C */
+ unsigned int RATE_GEN_B; /* 0x50 */
+ unsigned int OUTPUT_CONFIG; /* 0x54 */
+} GSA_20BIT_DAC_REG;
+
+#define DAC_20BIT_SS_ID 0x3574 /* Subsystem ID to find module on PCI bus */
+#define GSAO_20BIT_RESET (1 << 31)
+#define GSAO_20BIT_OFFSET_BINARY (1 << 25)
+#define GSAO_20BIT_10VOLT_RANGE (2 << 8)
+#define GSAO_20BIT_EXT_CLOCK_SRC (2 << 12)
+#define GSAO_20BIT_EXT_TRIG_SRC (2 << 14)
+#define GSAO_20BIT_DIFF_OUTS (1 << 16)
+#define GSAO_20BIT_ENABLE_CLOCK (1 << 5)
+#define GSAO_20BIT_SIMULT_OUT (1 << 18)
+#define GSAO_20BIT_DIO_RW 0x80 // Set first nibble write, second read for Watchdog
+#define GSAO_20BIT_PRELOAD 64 // Number of data points to preload DAC FIFO on startup (8 chan x 8 values)
+#define GSAO_20BIT_MASK 0x1fffff
+#define GSAO_20BIT_CHAN_COUNT 8
+#define GSAO_20BIT_DMA_LOCAL_ADDR 0x48
+#define GSAO_20BIT_AUTOCAL_SET (1 << 28)
+#define GSAO_20BIT_AUTOCAL_PASS (1 << 29)
+#define GSAO_20BIT_OUTPUT_ENABLE 0x80 // Enable DAC Outputs
--
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