From e2100c91ad1d9376d36eb5483130c95d05741a54 Mon Sep 17 00:00:00 2001
From: Rolf Bork <rbork@caltech.edu>
Date: Thu, 14 Nov 2019 11:29:13 -0600
Subject: [PATCH] Code cleanup for compiler warnings and volatile declarations.
---
src/fe/commData3.c | 4 ++--
src/fe/controllerIop.c | 17 +++++++++--------
src/fe/timing.c | 2 +-
src/include/drv/daqLib.c | 26 +++++++++++++-------------
src/include/drv/gsc16ai64.c | 2 +-
src/include/drv/gsc16ai64.h | 3 +++
src/include/drv/iop_adc_functions.c | 2 +-
src/include/drv/time_slave_io.c | 7 +++----
8 files changed, 33 insertions(+), 30 deletions(-)
diff --git a/src/fe/commData3.c b/src/fe/commData3.c
index 1915d30aa..146e25dfa 100644
--- a/src/fe/commData3.c
+++ b/src/fe/commData3.c
@@ -322,7 +322,7 @@ INLINE void commData3Send(
if ( lastPcie >= 0 )
{
clflush_cache_range(
- &( ipcInfo[ lastPcie ]
+ (void *)&( ipcInfo[ lastPcie ]
.pIpcDataWrite[ 0 ]
->dBlock[ sendBlock ][ ipcInfo[ lastPcie ].ipcNum ]
.data ),
@@ -381,7 +381,7 @@ INLINE void commData3Send(
if ( lastPcie >= 0 )
{
clflush_cache_range(
- &( ipcInfo[ lastPcie ]
+ (void *)&( ipcInfo[ lastPcie ]
.pIpcDataWrite[ 0 ]
->dBlock[ sendBlock ][ ipcInfo[ lastPcie ].ipcNum ]
.data ),
diff --git a/src/fe/controllerIop.c b/src/fe/controllerIop.c
index c86d0487e..737cfef5f 100644
--- a/src/fe/controllerIop.c
+++ b/src/fe/controllerIop.c
@@ -37,7 +37,7 @@
#if defined (TIME_MASTER) || defined (TIME_SLAVE)
-TIMING_SIGNAL *pcieTimer;
+volatile TIMING_SIGNAL *pcieTimer;
#endif
@@ -98,7 +98,7 @@ void *fe_start_iop(void *arg)
static int cpuClock[CPU_TIMER_CNT]; /// @param cpuClock[] Code timing diag variables
int sync21ppsCycles = 0; /// @param sync32ppsCycles Number of attempts to sync to 1PPS
- RFM_FE_COMMS *pEpicsComms; /// @param *pEpicsComms Pointer to EPICS shared memory space
+ volatile RFM_FE_COMMS *pEpicsComms; /// @param *pEpicsComms Pointer to EPICS shared memory space
int status; /// @param status Typical function return value
float onePps; /// @param onePps Value of 1PPS signal, if used, for diagnostics
int onePpsHi = 0; /// @param onePpsHi One PPS diagnostic check
@@ -128,6 +128,7 @@ void *fe_start_iop(void *arg)
int usloop=1;
double adcval[MAX_ADC_MODULES][MAX_ADC_CHN_PER_MOD];
+ adcInfo_t *padcinfo;
@@ -144,11 +145,11 @@ void *fe_start_iop(void *arg)
fz_daz(); /// \> Kill the denorms!
/// \> Init comms with EPICS processor */
- pEpicsComms = (RFM_FE_COMMS *)_epics_shm;
- pLocalEpics = (CDS_EPICS *)&pEpicsComms->epicsSpace;
- pEpicsDaq = (char *)&(pLocalEpics->epicsOutput);
+ pEpicsComms = (volatile RFM_FE_COMMS *)_epics_shm;
+ pLocalEpics = (volatile CDS_EPICS *)&pEpicsComms->epicsSpace;
+ pEpicsDaq = (volatile char *)&(pLocalEpics->epicsOutput);
-adcInfo_t *padcinfo = (adcInfo_t *)&adcinfo;
+ padcinfo = (adcInfo_t *)&adcinfo;
#ifdef OVERSAMPLE
/// \> Zero out filter histories
memset(dHistory, 0, sizeof(dHistory));
@@ -183,10 +184,10 @@ adcInfo_t *padcinfo = (adcInfo_t *)&adcinfo;
#ifdef TIME_MASTER
- pcieTimer = (TIMING_SIGNAL *) ((volatile char *)(cdsPciModules.dolphinWrite[0]) + IPC_PCIE_TIME_OFFSET);
+ pcieTimer = (volatile TIMING_SIGNAL *) ((volatile char *)(cdsPciModules.dolphinWrite[0]) + IPC_PCIE_TIME_OFFSET);
#endif
#ifdef TIME_SLAVE
- pcieTimer = (TIMING_SIGNAL *) ((volatile char *)(cdsPciModules.dolphinRead[0]) + IPC_PCIE_TIME_OFFSET);
+ pcieTimer = (volatile TIMING_SIGNAL *) ((volatile char *)(cdsPciModules.dolphinRead[0]) + IPC_PCIE_TIME_OFFSET);
syncSource = SYNC_SRC_DOLPHIN;
#endif
diff --git a/src/fe/timing.c b/src/fe/timing.c
index fa17d8cbc..1849f0b45 100644
--- a/src/fe/timing.c
+++ b/src/fe/timing.c
@@ -91,7 +91,7 @@ inline void initializeTimingDiags(timing_diag_t *timeinfo)
timeinfo->cycleTime = 0;
}
-inline void sendTimingDiags2Epics(CDS_EPICS *pLocalEpics,
+inline void sendTimingDiags2Epics(volatile CDS_EPICS *pLocalEpics,
timing_diag_t *timeinfo,
adcInfo_t *adcinfo)
{
diff --git a/src/include/drv/daqLib.c b/src/include/drv/daqLib.c
index 9217b16b6..cc4703c19 100644
--- a/src/include/drv/daqLib.c
+++ b/src/include/drv/daqLib.c
@@ -10,20 +10,20 @@ extern char *_daq_shm; ///< Pointer to DAQ base address in shared memory.
struct rmIpcStr *dipc; ///< Pointer to DAQ IPC data in shared memory.
struct cdsDaqNetGdsTpNum *tpPtr; ///< Pointer to TP table in shared memory.
char *daqShmPtr; ///< Pointer to DAQ data in shared memory.
-char *pEpicsIntData; ///< Pointer to EPICS integer type data in shared memory.
-char *pEpicsDblData; ///< Pointer to EPICS double type data in shared memory.
+volatile char *pEpicsIntData; ///< Pointer to EPICS integer type data in shared memory.
+volatile char *pEpicsDblData; ///< Pointer to EPICS double type data in shared memory.
unsigned int curDaqBlockSize; ///< Total DAQ data rate diag
// Added to get EPICS data for RCG V2.8
-char *pEpicsInt; // Pointer to current DAQ data in shared memory.
-char *pEpicsInt1;
-float *pEpicsFloat; // Pointer to current DAQ data in shared memory.
-double *pEpicsDblData1;
+volatile char *pEpicsInt; // Pointer to current DAQ data in shared memory.
+volatile char *pEpicsInt1;
+volatile float *pEpicsFloat; // Pointer to current DAQ data in shared memory.
+volatile double *pEpicsDblData1;
-int daqConfig(struct DAQ_INFO_BLOCK *, struct DAQ_INFO_BLOCK *, char *);
+int daqConfig(volatile DAQ_INFO_BLOCK *, volatile DAQ_INFO_BLOCK *, volatile char *);
int loadLocalTable(DAQ_XFER_INFO *, DAQ_LKUP_TABLE[], int, DAQ_INFO_BLOCK *,
DAQ_RANGE *);
int daqWrite(int, int, struct DAQ_RANGE, int, double *[], struct FILT_MOD *,
- int, int[], double[], char *);
+ int, int[], double[], volatile char *);
inline double htond(double in) {
double retVal;
@@ -70,7 +70,7 @@ inline double htond(double in) {
int daqWrite(int flag, int dcuId, DAQ_RANGE daqRange, int sysRate,
double *pFloatData[], FILT_MOD *dspPtr, int netStatus,
- int gdsMonitor[], double excSignal[], char *pEpics) {
+ int gdsMonitor[], double excSignal[], volatile char *pEpics) {
int ii, jj, kk; /* Loop counters. */
int status; /* Return value from called routines. */
unsigned int mydatatype;
@@ -536,13 +536,13 @@ int daqWrite(int flag, int dcuId, DAQ_RANGE daqRange, int sysRate,
/// - ---- Write EPICS integer values to beginning of local write buffer
if (dataInfo.cpyepics2times) {
- memcpy((void *)pWriteBuffer, pEpicsIntData, dataInfo.cpyIntSize[0]);
+ memcpy((void *)pWriteBuffer, (void *)pEpicsIntData, dataInfo.cpyIntSize[0]);
pEpicsInt = (char *)pWriteBuffer;
pEpicsInt += dataInfo.cpyIntSize[0];
pEpicsInt1 = pEpicsIntData + dataInfo.cpyIntSize[0] + 4;
- memcpy(pEpicsInt, pEpicsInt1, dataInfo.cpyIntSize[1]);
+ memcpy((void *)pEpicsInt, (void *)pEpicsInt1, dataInfo.cpyIntSize[1]);
} else {
- memcpy((void *)pWriteBuffer, pEpicsIntData, dataInfo.cpyIntSize[0]);
+ memcpy((void *)pWriteBuffer, (void *)pEpicsIntData, dataInfo.cpyIntSize[0]);
}
}
if (daqSlot == DAQ_XFER_CYCLE_DBL) {
@@ -921,7 +921,7 @@ int daqWrite(int flag, int dcuId, DAQ_RANGE daqRange, int sysRate,
/// @param[in] pEpics Pointer to beginning of EPICS data.
/// @return Size, in bytes, of DAQ data.
// **************************************************************************************
-int daqConfig(DAQ_INFO_BLOCK *dataInfo, DAQ_INFO_BLOCK *pInfo, char *pEpics) {
+int daqConfig(volatile DAQ_INFO_BLOCK *dataInfo, volatile DAQ_INFO_BLOCK *pInfo, volatile char *pEpics) {
int ii, jj; // Loop counters
int epicsIntXferSize = 0; // Size, in bytes, of EPICS integer type data.
int dataLength = 0; // Total size, in bytes, of data to be sent
diff --git a/src/include/drv/gsc16ai64.c b/src/include/drv/gsc16ai64.c
index 92d678a33..9bfcdc743 100644
--- a/src/include/drv/gsc16ai64.c
+++ b/src/include/drv/gsc16ai64.c
@@ -115,7 +115,7 @@ int gsc16ai64CheckDmaDone(int module)
/// @return ADC DMA Status (0=not complete, 16=complete
/// Note: This function not presently used.
// *****************************************************************************
-int gsc16ai64WaitDmaDone(int module, int *data)
+int gsc16ai64WaitDmaDone(int module, volatile int *data)
{
do{
}while((adcDma[module]->DMA_CSR & GSAI_DMA_DONE) == 0);
diff --git a/src/include/drv/gsc16ai64.h b/src/include/drv/gsc16ai64.h
index e0e0b9f20..999303039 100644
--- a/src/include/drv/gsc16ai64.h
+++ b/src/include/drv/gsc16ai64.h
@@ -5,6 +5,9 @@
#define ADC_SS_ID 0x3101 ///< Subsystem ID to identify and locate module on PCI bus
+int gsc16ai64AdcStop(void);
+int gsc16ai64CheckAdcBuffer(int);
+int gsc16ai64Init(CDS_HARDWARE *, struct pci_dev *);
/// Structure defining ADC module PCI register layout as per user manual
typedef struct GSA_ADC_REG{
diff --git a/src/include/drv/iop_adc_functions.c b/src/include/drv/iop_adc_functions.c
index ad20c1401..94815f8fd 100644
--- a/src/include/drv/iop_adc_functions.c
+++ b/src/include/drv/iop_adc_functions.c
@@ -195,7 +195,7 @@ iop_adc_read( adcInfo_t* adcinfo, int cpuClk[] )
#ifdef TIME_MASTER
pcieTimer->gps_time = timeSec;
pcieTimer->cycle = cycleNum;
- clflush_cache_range( &pcieTimer->gps_time, 16 );
+ clflush_cache_range( (void *)&pcieTimer->gps_time, 16 );
#endif
}
else
diff --git a/src/include/drv/time_slave_io.c b/src/include/drv/time_slave_io.c
index 42a160d83..f43000cd9 100644
--- a/src/include/drv/time_slave_io.c
+++ b/src/include/drv/time_slave_io.c
@@ -1,5 +1,5 @@
inline int
-waitPcieTimingSignal( TIMING_SIGNAL* timePtr, int cycle )
+waitPcieTimingSignal( volatile TIMING_SIGNAL* timePtr, int cycle )
{
int loop = 0;
@@ -14,7 +14,7 @@ waitPcieTimingSignal( TIMING_SIGNAL* timePtr, int cycle )
return ( 0 );
}
inline unsigned int
-sync2master( TIMING_SIGNAL* timePtr )
+sync2master( volatile TIMING_SIGNAL* timePtr )
{
int loop = 0;
int cycle = 0;
@@ -234,12 +234,11 @@ iop_dac_init( int errorPend[] )
}
inline int
-iop_dac_write( )
+iop_dac_write( void )
{
unsigned int* pDacData;
int ii, jj, mm;
int limit;
- int mask;
int num_outs;
int status = 0;
--
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