... | ... | @@ -54,6 +54,16 @@ Elements in the parameter list should be separated by a new line (\<enter\>). |
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- Options
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- `0` Don't require all configured IO (ADC/DAC) to be present when running
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- `1` Exit if the configured IO is different than expected
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- `vectorization=<VAL>`
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- Valid Options
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- `avx2`
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- `sse3`
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- Enables vectorization extensions in the compiler
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- `clock_div=<val>
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- This is the number of samples to process during a cycle at the model rate.
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- The fast-IOP, `rate=512K` uses a `clock_div=8`. 524288/8 = 65536 so user models get filtered/decimated data at the default expected IOP rate.
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- `optimizeIO=1`
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- When set, the IOP will not preload the DAC FIFOs with the usual 2 samples at startup. This can provide for lower phase delay for 2 clock cycles, or 30 usec at the typical 64K IOP rate.
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# Other Fields
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- `no_sync=1`
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... | ... | @@ -74,7 +84,28 @@ Elements in the parameter list should be separated by a new line (\<enter\>). |
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- Causes the model to skip any core isolation procedures
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- `flip_signals=1`
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- Causes all ADC and DAC data to be multiplied by -1 when being read and before being written by the IOP.
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- `sdf=1`
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- TODO
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- `casdf=1`
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- TODO
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- `noiseGeneratorSeed=<VAL>`
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- Sets an integer seed for all noise generated by uniform noise parts.
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- `gaussNoiseGeneratorSeed=<VAL>`
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- Sets an integer seed for all noise generated by Gaussian noise parts.
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- `virtualIOP=1`
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- Enables logic so you can run an IOP model on a system without any ADCs/DACs
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- `use_shm_ipc=1`
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- Regardless of IPC type definition in the Matlab model, the RCG will force all IPCs to be defined as SHMEM type.
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- This can be useful in running a production system model, most of which use PCIe type IPC, in a standalone system for testing.
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- `adcclock=128`
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- Used in IOP models with a `rate=128Hz`, to pass data at 131072 Hz
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- Most user models, of various rates, will automatically handle data from their IOP model. However when IOP's are configured to pass data faster than 64K, this parameter will be needed.
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- `bio_test=1`
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- Adds a test where we read back what we write to the BIO modules
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- `internalclk=1`
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- Configures the ADC to used an internally generated 64K clock
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- `no_zero_pad=1`
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- Causes the DAC output to not be zero padded for filtering. Instead the DAC output value is repeatedly run thru the filter `clock_div` time.
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# Deprecated Fields
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- `site`
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- Use the `ifo=` parameter instead.
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... | ... | @@ -91,3 +122,5 @@ Elements in the parameter list should be separated by a new line (\<enter\>). |
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- Removed
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- `no_dac_interpolation`
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- Removed
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- `sync`
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- Removed |
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\ No newline at end of file |