Commit 1e97c0d7 authored by Ezekiel Dohmen's avatar Ezekiel Dohmen
Browse files

Adding REMOTE_IPC_PAUSE channel and function, so the sending of IPCs can be disabled

parent 0123a100
......@@ -1224,13 +1224,16 @@ $fpartCnt = 0;
$inCnt = 0;
# END OF CODE PARSING and LINKED LIST GENERATION**************************************************************************
#//
#// Now have all info necessary to produce the supporting code and text files. \n
#// Start the process of writing files.\n
#// - Write Epics/real-time data structures to header file.
#// - Write Epics structs common to all CDS front ends to the .h file.
my $subs = substr($skeleton,5);
print OUTH "#define MAX_FIR \t $firCnt\n";
print OUTH "#define MAX_FIR_POLY \t $firCnt\n\n";
print EPICS "\nEPICS CDS_EPICS dspSpace coeffSpace epicsSpace\n\n";
......@@ -1269,6 +1272,11 @@ print OUTH "\tint burtRestore_mask;\n";
print OUTH "\tint dacDuoSet_mask;\n";
print OUTH "\tint dacDuoSet;\n";
print EPICS "INVARIABLE FEC\_$dcuId\_DACDT_ENABLE epicsInput.dacDuoSet int bi 0 field(ZNAM,\"OFF\") field(ONAM,\"ON\")\n";
print OUTH "\tint disableRemoteIpc;\n";
print OUTH "\tint disableRemoteIpc_mask;\n";
print EPICS "INVARIABLE \U$subs\E_REMOTE_IPC_PAUSE epicsInput.disableRemoteIpc int ai 0\n";
print OUTH "\tint pad1;\n";
if($diagTest > -1)
{
......@@ -1279,7 +1287,6 @@ print OUTH "\tint longAdcRd;\n";
print OUTH "} CDS_EPICS_IN;\n\n";
print OUTH "typedef struct CDS_EPICS_OUT {\n";
print OUTH "\tint dcuId;\n";
my $subs = substr($skeleton,5);
if (0 == length($subs)) {
print EPICS "OUTVARIABLE DCU_ID epicsOutput.dcuId int ao 0\n";
} else {
......
......@@ -200,6 +200,12 @@ void commData3Send(
syncWord = timeSec;
syncWord = ( syncWord << 32 ) + dataCycle;
#else
//If the IOP model has signaled us to not send remote IPCs, just return
if (ioMemData->stop_dolphin_ipcs != 0)
return;
sendBlock = ( ( cycle + 1 ) * ( IPC_MAX_RATE / IPC_RATE ) ) % IPC_BLOCKS;
// Calculate the SYNC word to be sent with all data.
// Determine the cycle count to be sent with the data
......
......@@ -206,6 +206,11 @@ commData3Send(
syncWord = timeSec;
syncWord = ( syncWord << 32 ) + dataCycle;
#else
//If the IOP model has signaled us to not send remote IPCs, just return
if (ioMemData->stop_dolphin_ipcs != 0)
return;
sendBlock = ( ( cycle + 1 ) * ( IPC_MAX_RATE / IPC_RATE ) ) % IPC_BLOCKS;
// Calculate the SYNC word to be sent with all data.
// Determine the cycle count to be sent with the data
......
......@@ -899,8 +899,17 @@ fe_start_controller( void )
// *****************************************************************
/// \> Check if code exit is requested
if ( cycleNum == MAX_MODULES )
{
if ( pLocalEpics->epicsInput.disableRemoteIpc != 0 ) {
ioMemData->stop_dolphin_ipcs = 1;
}
else {
ioMemData->stop_dolphin_ipcs = 0;
}
vmeDone = atomic_read(&g_atom_should_exit) |
checkEpicsReset( cycleNum, (struct CDS_EPICS*)pLocalEpics );
}
// *****************************************************************
// If synced to 1PPS on startup, continue to check that code
......
......@@ -747,9 +747,17 @@ fe_start_iop_user( )
}
/// \> Check if code exit is requested
if ( cycleNum == MAX_MODULES )
if ( cycleNum == MAX_MODULES ) {
if ( pLocalEpics->epicsInput.disableRemoteIpc != 0 ) {
ioMemData->stop_dolphin_ipcs = 1;
}
else {
ioMemData->stop_dolphin_ipcs = 0;
}
vmeDone = stop_working_threads |
checkEpicsReset( cycleNum, (struct CDS_EPICS*)pLocalEpics );
}
/// \> Write data to DAQ.
#ifndef NO_DAQ
......
......@@ -197,6 +197,7 @@ sci_error_t dolphin_init(CDS_HARDWARE *cdspci)
cdspci->dolphinPcieWritePtr = dolphinWrite[0];
cdspci->dolphinRfmReadPtr = dolphinRead[1];
cdspci->dolphinRfmWritePtr = dolphinWrite[1];
cdspci->stop_dolphin_ipcs = 0;
/* The reflective memory functionality is operational at this point. */
printf(" END OF DOLPHIN INIT ************************************* \n");
......
......@@ -189,6 +189,7 @@ mapPciModules( CDS_HARDWARE* pCds )
// dolphin read/write 1 is for long range PCIe (RFM) traffic
cdsPciModules.dolphinRfmReadPtr = ioMemData->dolphinRfmReadPtr;
cdsPciModules.dolphinRfmWritePtr = ioMemData->dolphinRfmWritePtr;
cdsPciModules.stop_dolphin_ipcs = 0;
for ( ii = 0; ii < cdsPciModules.rfmCount; ii++ )
{
cdsPciModules.pci_rfm[ ii ] = ioMemData->pci_rfm[ ii ];
......
......@@ -213,6 +213,10 @@ send_io_info_to_mbuf( int totalcards, CDS_HARDWARE* pCds )
ioMemData->dolphinRfmReadPtr = 0;
ioMemData->dolphinRfmWritePtr = 0;
#endif
ioMemData->stop_dolphin_ipcs = 0;
}
#endif //IOP_MODEL
#endif //ndef USER_SPACE
......@@ -358,6 +358,7 @@ main( int argc, char** argv )
ioMemData->dolphinPcieReadPtr = 0;
ioMemData->dolphinPcieWritePtr = 0;
#endif
ioMemData->stop_dolphin_ipcs = 0;
// Initialize buffer for daqLib.c code
RTSLOG_INFO( "Initializing space for daqLib buffers\n" );
......
......@@ -163,15 +163,14 @@ typedef struct IO_MEM_DATA{
volatile unsigned long *dolphinPcieWritePtr;
volatile unsigned long *dolphinRfmReadPtr;
volatile unsigned long *dolphinRfmWritePtr;
volatile int stop_dolphin_ipcs;
MEM_DATA_BLOCK iodata[MAX_IO_MODULES][IO_MEMORY_SLOTS];
// Combined DAC channels map; used to check on control app DAC channel allocations
unsigned int dacOutUsed[MAX_DAC_MODULES][16];
unsigned int ipcDetect[2][8];
int card[MAX_IO_MODULES];
int mem_data_rate;;
int mem_data_rate;
}IO_MEM_DATA;
//char (*__kaboom)[sizeof( IO_MEM_DATA )] = 1;
// Interface structure between user space IOP and user space control models
typedef struct IO_MEM_DATA_IOP{
......@@ -191,10 +190,10 @@ typedef struct IO_MEM_DATA_IOP{
volatile unsigned long *dolphinPcieWritePtr;
volatile unsigned long *dolphinRfmReadPtr;
volatile unsigned long *dolphinRfmWritePtr;
volatile int stop_dolphin_ipcs;
MEM_DATA_BLOCK iodata[6][65536];
// Combined DAC channels map; used to check on control app DAC channel allocations
unsigned int dacOutUsed[MAX_DAC_MODULES][16];
unsigned int ipcDetect[2][8];
}IO_MEM_DATA_IOP;
......@@ -255,6 +254,7 @@ typedef struct CDS_HARDWARE{
volatile unsigned long *dolphinPcieWritePtr;
volatile unsigned long *dolphinRfmReadPtr;
volatile unsigned long *dolphinRfmWritePtr;
volatile int stop_dolphin_ipcs;
volatile unsigned int *lptc[MAX_IOC]; /* LIGO PCIe Timing card */
unsigned int ioc_config[MAX_ADC_MODULES];
unsigned int ioc_instance[MAX_ADC_MODULES];
......
......@@ -249,13 +249,12 @@ iop_adc_read( adcInfo_t* adcinfo, int cpuClk[] )
cpuClk[ CPU_TIME_CYCLE_START ] ) /
CPURATE;
#ifdef XMIT_DOLPHIN_TIME
// TODO: This version of iop_adc_init() does not appear to be used when we
// are configured for XMIT_DOLPHIN_TIME, so can we even hit this ?
//
// Send time on Dolphin net if this is the time xmitter.
pcieTimer->gps_time = timeSec;
pcieTimer->cycle = cycleNum/UNDERSAMPLE;
clflush_cache_range( (void*)&pcieTimer->gps_time, 16 );
if ( pLocalEpics->epicsInput.disableRemoteIpc != 0) {
pcieTimer->gps_time = timeSec;
pcieTimer->cycle = cycleNum/UNDERSAMPLE;
clflush_cache_range( (void*)&pcieTimer->gps_time, 16 );
}
#endif
}
else
......
......@@ -1111,6 +1111,7 @@ bool Model::Impl::initialize_model_globals()
cdsPciModules.dolphinPcieWritePtr = static_cast<volatile long unsigned int*>(_dolphin_buffers_ptr->get_PCIE_write_ptr());
cdsPciModules.dolphinRfmReadPtr = static_cast<volatile long unsigned int*>(_dolphin_buffers_ptr->get_RFM_read_ptr());
cdsPciModules.dolphinRfmWritePtr = static_cast<volatile long unsigned int*>(_dolphin_buffers_ptr->get_RFM_write_ptr());
cdsPciModules.stop_dolphin_ipcs = 0;
// Print out all the I/O information
print_io_info( SYSTEM_NAME_STRING_LOWER, &cdsPciModules, 0 );
......
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