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Commit bbdd03c1 authored by Erik von Reis's avatar Erik von Reis
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Trigger time_shift correction after IOP starts. 

1PPS check and ADC sync should happen with no time_shift.
parent 1fa95af8
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src/fe/sync21pps.c
+ 1
− 1
View file @ bbdd03c1
......@@ -83,7 +83,7 @@ sync2pps_signal( one_pps_sync_t* p1pps, adcInfo_t* padcinfo, uint64_t cpuClock[]
timer_start( &cpuClock[ CPU_TIME_CYCLE_START ] );
if (iop_adc_sync_cards( padcinfo ) != 0 ) {
RTSLOG_ERROR("Unsynchronized ADCs were detected, and we were unable to fix the issue within the time alloted.");
RTSLOG_ERROR("Unsynchronized ADCs were detected, and we were unable to fix the issue within the time allotted.");
return -1;
}
......
src/include/drv/iop_adc_functions.c
+ 63
− 59
View file @ bbdd03c1
......@@ -27,8 +27,49 @@
//
// Global Data
//
static int first_adc_read = 1;
// A state variable for setting up time_shift
// When 2, we do a full read, but setup DMA for the next read
// When 1, We read in less data, completing the timeshift
// When 0, we're reading full, time_shifted data.
// State starts out 0 when initializing, so that 1PPS check is initially
// unaffected by time_shift
// The state is set to 2 a the moment the IOP starts with a call to iop_adc_setup_timeshift()
// Each cycle brings the state down until it's zero and remains there.
static int first_adc_read = 0;
/// After the ADCs are initialized, but before the first sample is read
/// Start the time_shift process
void
iop_adc_setup_timeshift() {
first_adc_read = 2;
}
/// Get the DMA size needed for the time_shift cycle for a particular ADC
int
iop_adc_timeshift_dma_size(int adc)
{
switch ( cdsPciModules.adcType[ jj ] )
{
case GSC_18AI32SSC1M:
case GSC_18AI64SSC:
if(cdsPciModules.adcTimeShift[ jj ] < UNDERSAMPLE)
{
samples = cdsPciModules.adcChannels[ jj ]
* (UNDERSAMPLE-cdsPciModules.adcTimeShift[jj]);
}
else
{
samples = cdsPciModules.adcChannels[ jj ] * UNDERSAMPLE;
}
dma_bytes = samples * 4;
break;
default:
dma_bytes = GSAI_DMA_BYTE_COUNT;
break;
}
return dma_bytes;
}
//Util functions
static int read_from_adc(adcInfo_t* adcinfo, unsigned adc_index);
......@@ -80,15 +121,7 @@ iop_adc_init( adcInfo_t* adcinfo )
{
case GSC_18AI32SSC1M:
case GSC_18AI64SSC:
if(cdsPciModules.adcTimeShift[ jj ] < UNDERSAMPLE)
{
samples = cdsPciModules.adcChannels[ jj ]
* (UNDERSAMPLE-cdsPciModules.adcTimeShift[jj]);
}
else
{
samples = cdsPciModules.adcChannels[ jj ] * UNDERSAMPLE;
}
samples = cdsPciModules.adcChannels[ jj ] * UNDERSAMPLE;
dma_bytes = samples * 4;
plx9056_adc_dma_setup( jj, dma_bytes );
*adcDummyData = 0x0;
......@@ -129,6 +162,8 @@ iop_adc_init( adcInfo_t* adcinfo )
}
// ADC Read *****************************************************************
// Routine for reading data from ADC modules.
int
......@@ -177,12 +212,12 @@ iop_adc_read( adcInfo_t* adcinfo, uint64_t cpuClock[] )
switch ( cdsPciModules.adcType[ card ] )
{
case GSC_18AI32SSC1M:
if( first_adc_read && cdsPciModules.adcTimeShift[card] == UNDERSAMPLE )
if( (first_adc_read == 1) && cdsPciModules.adcTimeShift[card] == UNDERSAMPLE )
{
// we'll re-use the first DMA result next IOP cycle.
continue;
}
if(first_adc_read)
if(first_adc_read == 1)
{
packedData +=
( cdsPciModules.adcChannels[ card ] * (UNDERSAMPLE
......@@ -196,12 +231,12 @@ iop_adc_read( adcInfo_t* adcinfo, uint64_t cpuClock[] )
first_chan_marker = GSAF_FIRST_SAMPLE_MARK;
break;
case GSC_18AI64SSC:
if( first_adc_read && cdsPciModules.adcTimeShift[card] == UNDERSAMPLE )
if( (first_adc_read == 1) && cdsPciModules.adcTimeShift[card] == UNDERSAMPLE )
{
// we'll re-use the first DMA result next IOP cycle.
continue;
}
if(first_adc_read)
if(first_adc_read == 1)
{
packedData +=
( cdsPciModules.adcChannels[ card ] *( UNDERSAMPLE
......@@ -215,7 +250,7 @@ iop_adc_read( adcInfo_t* adcinfo, uint64_t cpuClock[] )
first_chan_marker = GSA7_FIRST_SAMPLE_MARK;
break;
default:
if(first_adc_read && cdsPciModules.adcTimeShift[card] == 1)
if((first_adc_read == 1) && cdsPciModules.adcTimeShift[card] == 1)
{
continue;
}
......@@ -350,7 +385,7 @@ iop_adc_read( adcInfo_t* adcinfo, uint64_t cpuClock[] )
// loops and max_loops are usually equal to UNDERSAMPLE, but on the first cycle
// they loops may be less.
max_loops = UNDERSAMPLE;
if(first_adc_read)
if(first_adc_read == 1)
{
loops = UNDERSAMPLE - cdsPciModules.adcTimeShift[card];
}
......@@ -480,7 +515,11 @@ iop_adc_read( adcInfo_t* adcinfo, uint64_t cpuClock[] )
packedData +=
( cdsPciModules.adcChannels[ card ] * UNDERSAMPLE - 1 );
*packedData = DUMMY_ADC_VAL;
if ( first_adc_read )
if ( first_adc_read == 2 ) {
plx9056_adc_dma_set_size(card,
iop_adc_timeshift_dma_size(card) );
}
else if ( first_adc_read == 1 )
{
plx9056_adc_dma_set_size(card,
cdsPciModules.adcChannels[ card ] * UNDERSAMPLE * 4 );
......@@ -508,7 +547,9 @@ iop_adc_read( adcInfo_t* adcinfo, uint64_t cpuClock[] )
#endif
adc_wait_limit = MAX_ADC_WAIT_CARD_0;
}
first_adc_read = 0;
if (first_adc_read > 0) {
first_adc_read -= 1;
}
return 0;
}
......@@ -539,48 +580,16 @@ int iop_adc_sync_cards( adcInfo_t* adcinfo )
switch ( cdsPciModules.adcType[ card ] )
{
case GSC_18AI32SSC1M:
if( first_adc_read && cdsPciModules.adcTimeShift[card] == UNDERSAMPLE )
{
// we'll re-use the first DMA result next IOP cycle.
continue;
}
if(first_adc_read)
{
packedData +=
( cdsPciModules.adcChannels[ card ] * (UNDERSAMPLE
- cdsPciModules.adcTimeShift[card]) - 1 );
}
else
{
packedData +=
( cdsPciModules.adcChannels[ card ] * UNDERSAMPLE - 1 );
}
packedData +=
( cdsPciModules.adcChannels[ card ] * UNDERSAMPLE - 1 );
first_chan_marker = GSAF_FIRST_SAMPLE_MARK;
break;
case GSC_18AI64SSC:
if( first_adc_read && cdsPciModules.adcTimeShift[card] == UNDERSAMPLE )
{
// we'll re-use the first DMA result next IOP cycle.
continue;
}
if(first_adc_read)
{
packedData +=
( cdsPciModules.adcChannels[ card ] *( UNDERSAMPLE
- cdsPciModules.adcTimeShift[card] )- 1 );
}
else
{
packedData +=
( cdsPciModules.adcChannels[ card ] * UNDERSAMPLE - 1 );
}
packedData +=
( cdsPciModules.adcChannels[ card ] * UNDERSAMPLE - 1 );
first_chan_marker = GSA7_FIRST_SAMPLE_MARK;
break;
default:
if(first_adc_read && cdsPciModules.adcTimeShift[card] == 1)
{
continue;
}
packedData += GSAI_64_OFFSET;
first_chan_marker = GSAI_FIRST_SAMPLE_MARK;
break;
......@@ -619,11 +628,6 @@ int iop_adc_sync_cards( adcInfo_t* adcinfo )
packedData +=
( cdsPciModules.adcChannels[ card ] * UNDERSAMPLE - 1 );
*packedData = DUMMY_ADC_VAL;
if ( first_adc_read )
{
plx9056_adc_dma_set_size(card,
cdsPciModules.adcChannels[ card ] * UNDERSAMPLE * 4 );
}
plx9056_adc_dma_start( card );
break;
default:
......
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