-
- Downloads
First cut at RCG software to support new PCIe timing card and backplane.
This code is functional, but requires cleanup and compatability changes to still support present timing receiver and backplane.
Showing
- src/epics/util/feCodeGen.pl 5 additions, 0 deletionssrc/epics/util/feCodeGen.pl
- src/epics/util/lib/medmGenGdsTp.pm 2 additions, 0 deletionssrc/epics/util/lib/medmGenGdsTp.pm
- src/fe/controllerIop.c 68 additions, 7 deletionssrc/fe/controllerIop.c
- src/fe/map.c 18 additions, 0 deletionssrc/fe/map.c
- src/include/controller.h 2 additions, 0 deletionssrc/include/controller.h
- src/include/drv/cdsHardware.h 3 additions, 0 deletionssrc/include/drv/cdsHardware.h
- src/include/drv/iop_adc_functions.c 24 additions, 10 deletionssrc/include/drv/iop_adc_functions.c
- src/include/drv/iop_dac_functions.c 3 additions, 2 deletionssrc/include/drv/iop_dac_functions.c
- src/include/drv/ligoPcieTiming.c 129 additions, 0 deletionssrc/include/drv/ligoPcieTiming.c
- src/include/drv/ligoPcieTiming.h 60 additions, 0 deletionssrc/include/drv/ligoPcieTiming.h
Loading
Please register or sign in to comment