Daqd run number hash fix

Closes #171

See merge request cds/advligorts!159

It truncates the name/units.  This code adds an updated hash function that correctly uses the name/units.  It keeps the old function availble for use when a parameter is set for compatibility.

This adds {prefix}CHANNEL_LIST_CHECK_SUM as a 32bit crc of the channel list.

Fixed build_edc_ini to add newline at end of ini file if not present.

See merge request cds/advligorts!157

Daqd diagnostics

Closes #177

See merge request cds/advligorts!158

This defaults the channel to stalled and forces the system to take action to mark it as not stalled.  In a bad state we want to default to bad, not a bad state hidden because the producer wasn't run.

This adds code to the shmem receiver to have it signal when it has taken 2s to look for new data.

This is meant to be a simple flag to show when the producer is 'stuck' waiting for data.

- IOP card counting for model/bus comparison fixed. IOP code was
  double counting Contec6464 and counting IRIG-B card.
- Common module load changed to properly shutdown Dolphin if exit
  on incorrect card count by IOP.

Fixed build_edc_ini to add newline at end of ini file if not present.  Also added some simple tests for build_edc_ini.

running on Dolphin timing.

all ADC cards advertised by IOP were actually there. Example: IOP
model has 6 ADCs defined, but only found 3 on bus. Not normal in
production systems , but often the case  in test systems.

core locking, which is not really supported (lots of messages
fill dmesg). Changed this to use udelay call instead, as in
the rest of the FE code.

  - Modified user model mapping to account for any missing cards.
  - Brought the user space code for user apps up to date with new
    DAC mapping scheme.
  - Moved DAC channel deallocation routine to common app_dac_functions.c
    for use by both user model kernel and user space code.

Additional bounds checks in local_dc, dix_xmit, dix_recv.c

See merge request cds/advligorts!156

Removed an unused buffer in local_dc.c.  Updated the local_dc checks to be against the size of the output buffer, instead of the old 4mb/s limit.  This could be put back in, but needs to take into account a variable sized output buffer.

Added some checks to dix_xmit/recv to test for size before reading from/writing to the dolphin buffers.

As a temporary startup timing fix for special case of LHO PEM mid,
added Parameter block entry lhomid=1. If set in IOP model, this will
correct the 1 second timing offset of those units at startup.
This will be removed once LHO mids are upgraded to long range IOC.

  FIFO empty.
- Removed duplicate DAC status info passing routine from app_dac_functions.c
  as routine already exists in dac_info.c.
- Fix for DAC overrange status bit.

Daqd diagnostics

See merge request cds/advligorts!155

channel parameters in the DAQ.ini file. It appears later Perl
does not maintain ordering of fields in its db records. To get
around this, changed fmseq.pl to write DAQ .ini file entries
in a hardcoded order.

Add a parameter to the daqd 'DUMP_BROADCAST_FRAME' which keeps the broadcast frame that has gps % 60 = 0 around for 1 minute.

This is actually a checksum of he data block checksums, so that we only compute the checksum once (when we verify the data) for the data.

The data is being exported as {PREFIX}PRDCR_DATA_CRC

Involved
  - Adding dacAcr to cdsHardware structure to pass info upstream.
  - Modify DAC drivers to pass info on startup
  - Modify MEDM screen generator to add info.

DAC FIFO checking difficult to predict in this mode and tended
to add longer loop delays.

Removed AI chassis status bit from FE_STATS screen for 16bit DAC modules

  - Increased model part limit from 6000 to 8000
  - Replaced all tabs with 4 spaces in file

- Modified feCodeGen and Parameters to provide settings to force 1pps sync for test.
- ControllerIop.c sync21pps code changed to use iop_adc_read.
	- Removed sync21pps code from iop_adc_functions (errant code)
- Modified iop_dac_functions.c, check_dac_buffer() to set DAC error
  only in case FIFO FULL for 1pps and no sync modes
- Modified controller.h to set a lower threshold for 1pps sync signal
- Modified cdsHardware.h to set a different ADC for 1PPS when in test mode