START_DELAY can be set to any value of seconds to change the default 15 second
delay after each model is started.  If the startup sequencer is used, the delay can be set to 1 second.

previously 'rtcds restart --all' would not restart the IOP model, since the kernel was unable to unload hte module before it was ordered to load it again.
Now, stopping a model waits until the kernel module is unloaded.

RCG: some calculations were made out of order.

See merge request cds/advligorts!272

createDiagsFile.pm wass created as a refactoring of the feCodeGen.pl for writing the parts connections file.

Some global variables that were altered in this file were treated as locals, so the changes did not propagate
back to feCodeGen.pl.  This led to incorrect assessment that subsystems had no inputs, which meant subsystems could
be processed before their inputs, introducing a one cycle delay.

RCG: ADC read loop was only running once.

Closes #321

See merge request cds/advligorts!271

The loop was only running once for 65k IOP models with clock_div 2.  Not enough values were written to ADC, starving user models.

Less obviously, Fast ADC were not being decimated at the right rate.

Standard IOPs or slow ADCs on a fast IOP were unaffected, since the loop is meant to run once.

closes #321

RCG: virtualIOP=1 models do not compile.

See merge request cds/advligorts!270

This model adds necessary includes to virtualIOP models so that all needed symbols are available.

Disambiguate tag names in RCG

See merge request cds/advligorts!268

RCG: irigb skew generates an error when it's below 2 usec

See merge request cds/advligorts!267

LIGO PCIe timing card.  Otherwise, the lower limit remains unchanged.  But the displayed value only turns red below 2 no matter the timing, since MEDM is generated without knowledge of the timing system.

'IRIG-B' label on GDS-TP screen changed to 'TIME 0'

rcg: change LOCATION_NAME medm macro to give lowercase site name as used in /opt/rtcds/<site>/<ifo>/

RCG: Add a 'time_shift' parameter to ADC blocks in models.

Closes #296

See merge request cds/advligorts!265

'time_shift' is an integer.  For fast and low-noise ADC, 'time_shift' can range from 0 - clock_div (usually clock_div is 8).

Typically an IOP will read a fast or low-noise ADC 'clock_div' times per cycle.  With this change, the IOP will take 'time_shift' values from the previous cycle and

'clock_div' - 'time_shift' values from the current cycle, freeing more time to do other things in teh current cycle, but adding a bit of latency to the data.

For 16 bit ADC, time_shift can be 0 or 1.  When 1, ADC uses the value from the previous cycle.

In any case, 'time_shit' 0 causes the IOP to read all data from the current cycle.  For fast and low-noise ADC this can take the whole cycle.

Startup Sequencer: Make dolphin  drivers depend on dolphin port being active

See merge request cds/advligorts!264

Strengthen relation between dolphin driver and dolphin port control so that dolphin driver at least attempts an uninstall before port is disabled.

Also, make dolphin driver services part of dolphin driver target so that shutting down the target shuts down the drivers.

Filter out invalid messages that have the nanoseconds wrong for their cycle

See merge request cds/advligorts!263

 * Fix the checks in mbuf_probe gap_check to catch this case
 * Add a filter to cps_recv
 * Add an integration test
 * extend fe_simulation to simulate a timing glitch that sets the wrong nano-seconds value

RCG: Dolphin broadcast node changed from 4 to 252.

Closes #291

See merge request cds/advligorts!262

RCG: Dolphin broadcast node changed from 4 to 252.  This change allows node 4 to work like a normal node.

Exported Dolphin segments now properly unexported when there's an error farther down the line during initialization.

Some slight improvements to Dolphin initialization error messages.

 * Print out more timing information to help see if there is bad data.
 * Correct an existing debug output that was printing the cycle count instead of the nanoseconds.