Adding the use of the rts-cpu-isolator.h header, and calling the swappable/better named functions rts_isolator_exec()/rts_isolator_cleanup() instead of cpu up/down directly

Add a MODELRATE_CPS ( CPS ) variable to the model build.  Use this to calculate
dynamic limits for TIME0.

Change TIME0 measurement to always run on second cycle no matter the rate, and to
take rate into consideration for the calculation.

Fixes both fast (524K) and slow (33K) IOP models, specifically aimed at making LLO pemmid look good.

This model adds necessary includes to virtualIOP models so that all needed symbols are available.

LIGO PCIe timing card.  Otherwise, the lower limit remains unchanged.  But the displayed value only turns red below 2 no matter the timing, since MEDM is generated without knowledge of the timing system.

'IRIG-B' label on GDS-TP screen changed to 'TIME 0'

'time_shift' is an integer.  For fast and low-noise ADC, 'time_shift' can range from 0 - clock_div (usually clock_div is 8).

Typically an IOP will read a fast or low-noise ADC 'clock_div' times per cycle.  With this change, the IOP will take 'time_shift' values from the previous cycle and

'clock_div' - 'time_shift' values from the current cycle, freeing more time to do other things in teh current cycle, but adding a bit of latency to the data.

For 16 bit ADC, time_shift can be 0 or 1.  When 1, ADC uses the value from the previous cycle.

In any case, 'time_shit' 0 causes the IOP to read all data from the current cycle.  For fast and low-noise ADC this can take the whole cycle.

RCG: Dolphin broadcast node changed from 4 to 252.  This change allows node 4 to work like a normal node.

Exported Dolphin segments now properly unexported when there's an error farther down the line during initialization.

Some slight improvements to Dolphin initialization error messages.

"TOTAL" time now reads this same IO time plus the time to run through all 'UNDERSAMPLE' or 'clock_div' model calculations.

For most models that amounts to only one calculation, but for a fast ADC model running at 524 Hz, but spitting out data at 65 Hz, that's all 8 calculations.

model to run with Contec controller timing card.

names of supported IO cards for use by print message tasks, such as print_io_info().

midstation configuration).Part of issue #231.

available with new PCIe timing card firmware.

Works with older PCIe card firmware, but now need to modify for latest
firmware (gpstime read as a single 64bit word).

card_count array and check card count by type. All old card type
count variables,e.g. adc16Count, adc18Count, etc., removed from
CDS_HARDWARE structure.

now checks card count by type using new card_count array in
CDS_HARDWARE struct type. Still need to update user space code.

Bug fix 249 continiued: Added card_count[] array to CDS_HARDWARE type. Idea is to get rid of all the
individial card type counter variables in favor of a single array that has count for each type of
io card. Index is card type,as defined at start of header file. Presently, code is working with
new array, but now need to remove old counters.

if pci_red_config fails.  Fault causes IOP to exit and add
message to syslog as to faulty card and slot number.

controllerxxx.c files.

same code as 1PPS sync.

of list to make virtual IOP models.

tests.

1) Moved sync21pps checking to sync21pps.c
2) Added WD signal to AI chassis diag for testing

error in AI chassis WD reporting on IO slot status.

1) Remove remnants of verify slot code, which was moved to moduleLoad.c previously.
2) Change to HKP_DAC_WD_CHK, now that DACs have common register map.
3) Some added/removed comments.

- IOP running on PCIe net time cannot have ligo timing card check in moduleLoad.c.
- For 1PPS testing, need to remove verify slots for controllerIop.c.

allows filling in the IOP_IO_STAT screen with useful info before kernel exit
when the IOP does not find the correct number of IO cards.